• Principal Design IC

    Cadence Design Systems, Inc. (San Jose, CA)
    …make an impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a set of common SerDes standards and… more
    Cadence Design Systems, Inc. (11/13/24)
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  • Principal Power Amplifier/RFIC…

    Skyworks (San Jose, CA)
    …Description We, at Skyworks are seeking an experienced, industry professional for the role of Principal Power Amplifier/RF IC Design Engineer at our San Jose ... who together can change the way the world communicates. Job Responsibilities Principal Power Amplifier/RF IC Design Engineer is responsible for design more
    Skyworks (08/29/24)
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  • Digital IC Implementation, Principal

    Cadence Design Systems, Inc. (San Jose, CA)
    …driving customer engagements, you will enhance your in-depth knowledge in nanometer design , unlock unique expertise in digital design implementation, and level ... and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts...and Static Timing Analysis is required Prior experience with IC digital implementation flows and backend EDA tools including… more
    Cadence Design Systems, Inc. (10/05/24)
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  • STA/Emir IC Principal Solutions…

    Cadence Design Systems, Inc. (San Jose, CA)
    …drive Pre-sales and Post-sales activities at advanced nodes for Cadence Digital IC products. The qualified candidate will have hands-on experience with Timing, Emir, ... Characterization & Simulation tools, and good circuit design knowledge to help enable Signoff solutions at customer...for myriad circuits including memory designs and mixed signal design + The SE will participate in technical benchmarks,… more
    Cadence Design Systems, Inc. (10/18/24)
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  • Principal Physical Design Engineer…

    Broadcom (San Jose, CA)
    …well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for the 3nm high speed ... EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and...12+ years, or ME plus 10+ years, in deep-sub-micron IC physical designs, or equivalent experience Experience with TCL… more
    Broadcom (11/01/24)
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  • Principal , Software Engineer

    Walmart (Sunnyvale, CA)
    …within span, decide on tradeoffs under guidance as neededSolution Design :Requires knowledge of:Software architecture; Distributed systems; Scalability; Design ... DesignTo assist in creation of simple, modular, extensible and functional design for the product/solution in adherence to the requirements. Evaluate trade-offs… more
    Walmart (10/25/24)
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  • Principal Layout Engineer

    ManpowerGroup (San Jose, CA)
    …and layout size optimization of CMOS JI and SOI + Collaborate with Analog and Power IC design engineers in Asia and the US + Manage tape-out process, data ... Mobile, Consumer, IoT, and Industrial applications is seeking an experienced Principal Layout Engineer. **RESPONSIBILITIES:** + Layout of Power and Analog integrated… more
    ManpowerGroup (10/03/24)
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  • Senior/Returnship, Signal Integrity (SI) and Power…

    Cadence Design Systems, Inc. (San Jose, CA)
    …in the context of multiple flows including high speed signal and/or power design , signal and power integrity. Design experience and industry knowledge of ... Signal, Power, and Thermal analysis for IC , package, and PCB designs are required. The candidate...Electromagnetics, Thermal, and RF related to Package and PCB Design are required. Candidate should have experience in Cadence… more
    Cadence Design Systems, Inc. (10/05/24)
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  • Principal Product & Test Engineer

    Microsoft Corporation (Sunnyvale, CA)
    …manage and optimize the Cloud infrastructure. We are looking for a ** ** ** Principal Product & Test Engineer** to work in the dynamic Microsoft Silicon Manufacturing ... test program implementation to optimize for System on Chip (SOC) power/Thermal Design Power (TDP). Work closely with platform/system engineers to drive necessary… more
    Microsoft Corporation (11/04/24)
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  • ASIC Digital Design Engineer - WiFi MAC

    Qualcomm (San Jose, CA)
    …(eg, RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. * Writes and reviews ... for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design , optimize, verify, validate, implement, and document IP (block/SoC) development for a… more
    Qualcomm (09/23/24)
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  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …Power Implementation; WiFi or WLAN; Power Optimization; ARM IP/Coresight based debug design ** Principal Duties and Responsibilities:** * Leverages advanced ASIC ... Virtuoso) to execute and enable highly advanced architecture and design of multiple complex blocks/SoC or IC ...and design of multiple complex blocks/SoC or IC Packages. * Writes detailed technical documentation for highly… more
    Qualcomm (10/10/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …(eg, RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. * Writes and reviews ... **General Summary:** . Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such as OFDM and OFDMA modulators and… more
    Qualcomm (09/25/24)
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  • Analog Custom Layout Principal Application…

    Cadence Design Systems, Inc. (San Jose, CA)
    …leadership qualities. Position Requirements: This position requires a solid understanding of IC design process/methodology in analog and mixed-signal design . ... Hands-on knowledge / experience on analog and mixed-signal physical Design / Debug /would be a plus. The role...and hands-on experience of complete analog Back-end flow from design entry, Basic layout editing to advance automation flows… more
    Cadence Design Systems, Inc. (10/15/24)
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  • Principal Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Power Integrity, Electromagnetics, Thermal, and RF related to Package and PCB Design are required. Candidate should have experience in Cadence Allegro platform tools ... including: Sigrity, Clarity, Celsius, PCB Editor, IC Package, or competitive tools in these areas. The...modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property… more
    Cadence Design Systems, Inc. (10/16/24)
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