- Cadence Design Systems, Inc. (San Jose, CA)
- …In collaboration with R&D, provide in-depth technical assistance to help support advanced verification flows to secure design wins Champion the customer needs ... the skills and expertise you gain as an Application Engineer here at Cadence will put you miles ahead...writing scripts (Perl, Python or Tcl) Strong software, HDL design and verification skills Ability to quickly… more
- City and County of San Francisco (San Francisco, CA)
- …Description: The Department of Technology (DT) Public Safety Division is looking for a Principal Network Engineer to join the team that designs, builds, and ... considerations due to its distinct service, support, and security requirements. The Principal Network Engineer will join the technical team that designs,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Protium is leading product in FPGA Emulation/Prototyping domain. This role is to design , verification , timing closure and hardware validation of the FPGA IPs. ... gate array intellectual properties (FPGA IPs) for Protium platform, including design , verification , integration, timing closure, documentation and releasing the… more
- Qualcomm (Santa Clara, CA)
- …verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification ... processes of diagnosis/detection; some limited data analysis may be required. ** PRINCIPAL DUTIES AND RESPONSIBILITIES:** + Applies Graphics knowledge and experience… more
- Broadcom (San Jose, CA)
- …as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the 3nm high ... . Physical implementation of blocks and top-level including clock-tree. . Physical verification and timing closure for block and chip-level. . Static and dynamic… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …for front-end coding, scripting and developing flows at all phases of the digital design and functional verification . It is further expected that the candidate ... to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in DSP and algorithms is a… more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Principal Information Systems Engineer - Networks Specialty are only ... that integrate these systems together as an enterprise networking backbone. The 1044 Principal Networks Engineer is the highest level in the Engineer… more
- City and County of San Francisco (San Francisco, CA)
- …minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Principal Information Systems Engineer - Applications Specialty are only ... that integrate these systems together as an enterprise networking backbone. The 1044 Principal Applications Engineer is the highest level in the Engineer… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …who want to make an impact on the world of technology. Job Title: Principal Product Engineer Location: San Jose, CA Reports to: Product Engineering Director ... world of technology. We are looking for a Product Engineer (PE) to lead and drive customer engagement to...at Cadence focusing on the unique requirements of the design and verification community. + Help develop… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …the world of technology. Cadence Design Systems Inc. is looking for a Product Engineer of the Verisium Debug Team in San Jose. Cadence has been nominated as a ... market. Our team deploys and defines the world leading verification solutions used by top tier hardware design...framework, and solutions. We are looking for a Product Engineer (PE) to lead and drive customer engagement to… more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity...for TE Connectivity you will focus on the electrical design , simulation, and verification -validation testing of high… more
- Qualcomm (Santa Clara, CA)
- …reference designs, user guides, SDKs, and more. **Position: Server Software Integration Engineer ** As a Server Software Integration Engineer , you will take ... with cross-functional engineering teams, including SoC, software, firmware, SW/FW Verification Engineering, Configuration & Release Management, in addition to… more
- Microsoft Corporation (San Francisco, CA)
- …assets and ensure compliance with all relevant regulations and standards. We are hiring a Principal Software Engineer to join our team. This role will be part of ... in threat model reviews and help identify security flaws early in the design phases + Foster onboarding and adoption of Security Development Lifecycle (SDL) +… more
- ManpowerGroup (San Jose, CA)
- …of Mobile, Consumer, IoT, and Industrial applications is seeking an experienced Principal Layout Engineer . **RESPONSIBILITIES:** + Layout of Power and Analog ... Sr. Layout Engineer **SUMMARY:** A fast-growing Power Management division focusing...verification checks (LVS, DRC) + Full analog layout design and layout size optimization of CMOS JI and… more
- Siemens Digital Industries Software (Fremont, CA)
- …**Req ID:** 446257 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to ... the increasingly complex world of chip, board, and system design . We are seeking a passionate and highly skilled...We are seeking a passionate and highly skilled software engineer to join the QuestaSim (Simulation) R&D team at… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …on the world of technology. Cadence is a pivotal leader in electronic design , building upon more than 30 years of computational software expertise. The company ... applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that...Protium Prototyping Platform. The candidate will join the Hardware Verification Research and Development team and be will contribute… more
- Cisco (San Jose, CA)
- …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... performance requirements. * Help define, evolve, and support our design methodology. * Mentor junior engineers on performing project...project tasks and problem solving. * Collaborate with the verification , PD, DFT, Package and SW teams to develop… more
- Celestica (San Jose, CA)
- …is the brand behind the brands you love in tech and we design , develop, and manufacture leading-edge Hardware Platform Solutions in Networking, Storage, and Server ... an unrelenting drive to find the way for our customers. **Let's engineer the future together** . Responsible for architecting, implementing, and supporting power… more
- Qualcomm (Santa Clara, CA)
- …degree in Science, Engineering, or related field and 6+ years of ASIC design , verification , validation, integration, or related work experience. OR Master's ... degree in Science, Engineering, or related field and 5+ years of ASIC design , verification , validation, integration, or related work experience. OR PhD in… more
- Qualcomm (Santa Clara, CA)
- …to help create a smarter, connected future for all. As a Qualcomm Hardware Systems Engineer , you will design a complete framework or system that influences the ... best power, performance, and area. * Collaborates with teams (eg, design , verification , validation, software and systems engineering, architecture development… more