- Capgemini (San Francisco, CA)
- ** RTL Design Engineer ** **Location: San Jose CA / Bay Area, but will consider remote.** **Job description:** . As an RTL Design Engineer you will ... . Develop micro architectural document from requirements specifications. . Extensive RTL design utilizing Verilog / SystemVerilog . Perform basic… more
- Google (Sunnyvale, CA)
- …+ Work with Design Validation (DV) teams to create testplans for, verify, and debug design RTL . + Work with physical design teams to ensure design ... practical experience. + 2 years of experience in Digital design using SystemVerilog RTL . Preferred qualifications: + Master's degree or PhD in Electrical… more
- Broadcom (San Jose, CA)
- …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... Science and 8+ years of meaningful experience in SOC architecture and design experience or Master's Degree in Electrical Engineering, Computer Engineering, or… more
- Qualcomm (Santa Clara, CA)
- … development targeted for high performance, low power devices. As a CPU Micro-architecture and RTL Design Engineer , you will work with chip architects to ... specification. + RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. + Functional… more
- NVIDIA (Santa Clara, CA)
- … design process + Develop and enhance C++ based software tools to improve RTL design productivity and quality + Research and develop software solutions to ... rtl , and gate level designs. As a software engineer , you will craft highly efficient software to automate...stand out from the crowd: + Good architecture and RTL design knowledge + Strong expertise in… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP integration and ... and developing flows at all phases of the digital design and functional verification. It is further expected that...on DSP or High Speed Serdes (Viterbi and encoder design ). . The ideal candidate will have at least… more
- Qualcomm (Santa Clara, CA)
- …using a scripting language such as Perl or Python. **Roles and Responsibilities** As an RTL engineer you will own or participate in the following: * Performance ... specification. * RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals. * Functional… more
- Google (Sunnyvale, CA)
- …efficiency, and integration. In this role, you will join a team working on SoC-level RTL design for our data center accelerators. You'll own top-level RTL , ... segmentation to enable programmatic assembly of custom solutions based off user design intent. + Design RTL architecture of system to allow for automated… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + ... RTL , synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design … more
- Broadcom (San Jose, CA)
- …apply.** **Job Description:** **Digital Design : Lead SerDes Digital IP Design Engineer :** Oversees definition, design , verification co-definition, and ... for SerDes designs. Knowledge of all aspects of the process flow from high-level RTL design to synthesis, RTL / netlist audits (using tools such as Spyglass),… more
- Google (Mountain View, CA)
- FPGA Design Engineer , Project Taara (Fixed Term) Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the team: ... feedback-based precision line-of-sight tracking systems. + Develop testbenches for RTL modules, perform simulation, and verify design ...for RTL modules, perform simulation, and verify design requirements are met. + Integrate third party IP… more
- Microsoft Corporation (Mountain View, CA)
- …and-ultimately-making a difference in the world. We are looking for a **Fabric IP Design Engineer ** to join the team. **Growth Mindset** We fundamentally believe ... Cloud Compute Development Organization is seeking a **Fabric IP Design Engineer ** to join our IP development...to join our IP development team covering micro-architecture implementation, RTL Coding, IP integration, Circuit Design and… more
- Meta (Sunnyvale, CA)
- …Area. 14. Knowledge of front-end and back-end ASIC tools. 15. Experience with RTL design using SystemVerilog or other HDL. 16. Experience managing multiple ... Engineering, relevant technical field, or equivalent practical experience. 13. Experience with RTL Synthesis and design optimization for Power, Performance,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and timing analysis.… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion ... of external and internal IPs. + Contribute to cross-team RTL methodologies to achieve efficient design reuse....to cross-team RTL methodologies to achieve efficient design reuse. + Evaluate microarchitectural options and collaborate with… more
- SpaceX (Sunnyvale, CA)
- Sr. DDR IP Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
- Google (Sunnyvale, CA)
- …efficiency, and integration. In this role, you will join a team working on SoC-level RTL design for our data center accelerators. In this role you will own ... top-level RTL , architecture, design and implementation of global communication busses, and integration of complex ASIC designs. This is a cross-functional and… more
- NVIDIA (Santa Clara, CA)
- …group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and ... Are you looking for an SOC Design Engineer opportunity? If yes, come...+ Excellent analytical and problem-solving skills. + Experience in RTL design (Verilog), verification (UVM, System Verilog),… more
- Tarana Wireless (Milpitas, CA)
- …to multipoint wireless products. + Architecture and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog + Frontend design ... This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for...Interface IPs + Chip level integration and verification + RTL design and integration of large functional… more
- Amazon (Cupertino, CA)
- …and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and architectures, ... like team through excellent collaboration and teamwork with other physical design engineers as well as with the RTL /Arch. teams A day in the life About the team… more