• Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools and automation to drive efficiency and collaboration among our High ... the cutting edge of industry techniques + Collaborate with architects, designers, verification engineers, as well as methodology and infrastructure engineers to… more
    NVIDIA (11/15/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation of the world's leading SoC's and GPU's. This position offers the ... be doing: + As a key member of our ASIC Verification team, you will verify the...the design and implementation of your unit, define the verification scope, develop the verification infrastructure more
    NVIDIA (10/01/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... of computing. What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will... verification scope and driving the development of verification infrastructure , DV strategies and test-planning for… more
    NVIDIA (10/25/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...resets design has increased many folds. This requires sophisticated verification to deliver a bug free clocks design to… more
    NVIDIA (10/16/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Verification Engineer to verify the design and implementation of the world's leading SoC's and GPU's. This ... of computing! What you'll be doing: + As a Senior Verification Engineer at NVIDIA, you will...verification scope, and contribute to the development of verification infrastructure related to high speed IO… more
    NVIDIA (09/06/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual ... the most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will...team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure more
    NVIDIA (11/08/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... computer engineering or equivalent degree (or equivalent experience) + 3+ years of verification experience + Exposure to Computer Architecture, ASIC design and … more
    NVIDIA (10/14/24)
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  • ASIC Design Verification Engineer

    Cisco (San Jose, CA)
    …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon ... include: * Architect block, cluster and top-level DV environment infrastructure . * Develop DV infrastructure from scratch... design verification experience. * Proficient in ASIC verification using UVM/System Verilog. * Proficient… more
    Cisco (10/01/24)
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  • Senior ASIC Design…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... verification tools, flows and methodologies. + Build and reform verification infrastructure and methodologies to meet the demands of next generation IPs. +… more
    NVIDIA (09/25/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior Verification Engineer to join our Display Team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU ... this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own...and implement test plan, own all tasks involved in verification sign off to deliver high quality IPs, which… more
    NVIDIA (10/22/24)
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  • Senior ASIC Front End…

    NVIDIA (Santa Clara, CA)
    ASIC RTL/ Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position offers the ... intelligence to self-driving cars and supercomputers. Our team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We… more
    NVIDIA (11/07/24)
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  • Senior ASIC Verification

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Verification Engineer! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the world's ... PCIe and CXL designs + Understand the design, define the verification scope, develop the verification infrastructure , and verify the correctness of the… more
    NVIDIA (10/20/24)
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  • Senior ASIC Verification

    Tarana Wireless (Milpitas, CA)
    …execute plans at system or full chip level + Build and continuously improve verification infrastructure and methodologies to meet the demands of next generation ... UVM, and C/C+ + + Experience with building abstraction layered and reusable verification testbench infrastructure + Working knowledge of scripting languages such… more
    Tarana Wireless (10/13/24)
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  • Senior E/E & Semiconductor Engineer…

    Capgemini (San Francisco, CA)
    **Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip development, ... top level and/or blocks, with experience across the complete ASIC /SOC design flow including routing, static timing closure, EM/IR...Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints… more
    Capgemini (10/16/24)
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  • Senior ASIC Physical Design Engineer

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... of signoff closure - Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding constraints and fixing design/timing… more
    Capgemini (10/16/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …world What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer/lead to engage in new development of our UCS family. ... * Architect block, cluster and top level DV environment infrastructure * Create DV infrastructure from scratch...Master's degree in equivalent experience * Prior experience in Asic verification using UVM/System Verilog. * Prior… more
    Cisco (10/03/24)
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  • Senior Memory Controller…

    NVIDIA (Santa Clara, CA)
    verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, ... NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for...MS or equivalent experience. + 5+ years of hands-on ASIC verification of challenging design units over… more
    NVIDIA (11/01/24)
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  • Senior Verification Engineer, SoC

    NVIDIA (Santa Clara, CA)
    Job Description NVIDIA is seeking best-in-class Senior SoC ASIC Verification Engineer to verify the world's most powerful SoCs with AI capabilities for ... at full chip level. + Build and continuously reform verification infrastructure and methodologies to meet the...equivalent experience. + 5+ years of relevant experience in ASIC DV. + Exceptional analytical skills and problem solving… more
    NVIDIA (10/08/24)
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  • Senior Silicon Engineering

    Microsoft Corporation (Santa Clara, CA)
    …impact? The Data Processing Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a ** Senior Silicon Engineer** . You will join ... key components of functional validation of complex Application-Specific Integrated Circuit ( ASIC ) System on Chip (SOC) using Universal Verification Methodology… more
    Microsoft Corporation (11/12/24)
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  • Senior Staff Engineer, Electrical Design

    Renesas (San Jose, CA)
    Senior Staff Engineer, Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + Contribute ... high-speed design concepts + Participate in design, architecture, and verification reviews + Cover digital backend design from synthesis,...route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in… more
    Renesas (11/09/24)
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