- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU ... and intelligence. Make the choice to join our diverse team today! As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the … more
- Capgemini (Santa Clara, CA)
- **Job Title:** ** Design Verification Engineer** **Job Location: Santa Clara CA** **Job description:** *Architect and Create verification environments using ... UVM/OVM/SystemVerilog/Python/C/C **Required Skills:** 7 years of experience in pre-silicon design verification * Proficiency in C-shell scripting, Verilog-HDL… more
- Capgemini (Sunnyvale, CA)
- …**Sunnyvale CA - Onsite role** **Job description:** We are seeking Mixed signal Design Verification Engineer who is proficient in system verilog real number ... _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification Engineer_ **Location:** _CA-Sunnyvale_ **Requisition ID:** _076750_ more
- Cadence Design Systems, Inc. (San Jose, CA)
- …responsible for front-end coding, scripting and developing flows at all phases of the digital design and functional verification . It is further expected that ... Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP...and stages + Understanding impacts of analog and mixed-signal design and verification on digital -on-top… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer! NVIDIA has continuously reinvented itself over two decades. Our invention of the ... + 5+ years of experience working in high-speed I/O digital design , knowledge at protocol level (SATA,...in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM + Proven experience with… more
- Teledyne (Mountain View, CA)
- …capabilities for current and emerging challenges. Teledyne Microwave Solutions is hiring a Digital Design Engineer that will be responsible for the digital ... module interfaces, conducts design reviews, and participates in design implementation. Responsibilities include debugging, verification , and resolving… more
- SpaceX (Sunnyvale, CA)
- …environment with changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $170,000.00 - $230,000.00/per year ... Sr. Design Verification Engineer (Silicon Engineering) at...capabilities of the Starlink network. RESPONSIBILITIES: + Responsible for digital ASIC and/or FPGA verification at block… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon ... other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC...to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it?… more
- Capgemini (San Francisco, CA)
- **Job role:** **Lead DV IP Verification Engineer** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... and UVM (Universal verification ) methodology for IP verification . IP verification must have and SoC...combines its broad industry knowledge and cutting-edge technologies in digital and software to support the convergence of the… more
- Qualcomm (Santa Clara, CA)
- …of experience with scripting tools and programming languages. * 2+ years of experience with design verification methods. * 1+ year of work experience in a role ... verification and timing of the entire chip . Design quality check such as lint, CDC and low...Leverages advanced ASIC knowledge and experience to define, model, design ( digital and/or analog), optimize, verify, validate,… more
- Qualcomm (San Jose, CA)
- …to help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design , optimize, verify, validate, ... Engineering, or related field and 4+ years of ASIC design , verification , validation, integration, or related work...of work experience in a role requiring interaction with senior leadership (eg, Director level and above). **Principal Duties… more
- City and County of San Francisco (San Francisco, CA)
- …to services, while keeping equity and ethical use of data at the forefront. The Senior Digital Project Analyst is a member of the Mayor's Office of Innovation. ... measures to enhance civic engagement with tech leaders within the community. The Senior Digital Project Analyst will assist with day-to-day operations and… more
- Renesas (San Jose, CA)
- Senior Staff Engineer, Electrical Design Job...a plus + Experience with Verilog and/or SystemVerilog for digital design and verification is ... design concepts + Participate in design , architecture, and verification reviews + Cover digital backend design from synthesis, static timing and logic… more
- Microsoft Corporation (Mountain View, CA)
- … including microarchitecture specification development, RTL coding in Verilog/System Verilog, design verification collaboration, and CDC/Lint closure + 4+ years ... and augmented reality. We are looking for a ** Senior Logic Design Engineer** to work in...+ Establish yourself as an integral member of a digital logic design team for the development… more
- Tarana Wireless (Milpitas, CA)
- …designs for our point to multipoint wireless products. + Architecture and micro-architecture of digital subsystems + RTL design of digital circuits using ... This position will challenge you! The Senior ASIC Engineer will work on complex ASIC...Memory, and Interface IPs + Chip level integration and verification + RTL design and integration of… more
- Capgemini (San Francisco, CA)
- …latest Synopsys tools. The candidate should have a high aptitude for floor-planning the design of complex digital top level and/or blocks, with experience across ... **Physical Design Engineer** **Job Description:** **The ASIC Physical ...Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints… more
- NVIDIA (Santa Clara, CA)
- …are looking for a senior engineer to be part of the mixed-signal design team building next generation NVLINK. This position offers the opportunity to have real ... characterization. + Help by defining circuit requirements and complete design from schematic, layout, and verification to...test bench environments for component and top level circuit verification + Behavioral modeling of analog and digital… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, ... We are a team of hardworking engineers working across the micro-architecture, design , verification , implementation, and post silicon validation of NVIDIA… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...block and chip level + Understanding constraints and fixing design /timing techniques + Block level implementation from netlist to… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... on features, performance requirements and system limitations, and deliver a fully verified design by working closely with verification engineers. + Deliver a… more