- SanDisk (Milpitas, CA)
- …the Flash memory it needs to keep our world moving forward. **Job Description** ** Senior /Staff CAD Engineer ** We are looking for an experienced ** Senior ... Cells (PCell) to boost schematic/layout productivity. + **Design Rule & Verification Support:** + Develop and maintain Design Rule Checking (DRC) runsets… more
- NVIDIA (Santa Clara, CA)
- …a lasting impact on the world! We are currently looking for a Sr VLSI Physical Verification Methodology Engineer . What you'll be doing: + Responsible for ... SOL tape-out - including feedback recognition and correlation. + Determining physical verification methodologies to improve workflow efficiency and timely… more
- SpaceX (Sunnyvale, CA)
- …extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $170,000.00 - $230,000.00/per year Your ... Sr. Design Verification Engineer (Silicon Engineering) Sunnyvale, CA...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer - Systems Specialty are only ... integrate these systems together as an enterprise networking backbone or platform. The 1043 Senior Systems Engineer is the advanced journey level in the … more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer - Networks Specialty are only ... components that integrate these systems together as an enterprise networking backbone. The 1043 Senior Networks Engineer is the advanced journey level in the … more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer - Applications Specialty are only ... that integrate these systems together as an enterprise networking backbone. The 1043 Senior Applications Engineer is the advanced journey level in the … more
- City and County of San Francisco (San Francisco, CA)
- …the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer - Security Specialty are only ... mobile devices, LANS, WANs, servers, data storage and the physical and logical components that integrate these systems together...systems together as an enterprise networking backbone. The 1043 Senior Security Engineer is the advanced journey… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV),Cadence… more
- City and County of San Francisco (San Francisco, CA)
- …and equipment in a large complex facility or in a multi-faceted facility. The Senior Stationary Engineer supervises the work of subordinate staff and performs ... in that the latter is the journey level class of the series. Class 7335 Senior Stationary Engineer is distinguished from the next higher class 7205 Chief… more
- Capgemini (Santa Clara, CA)
- **About the Job You're Considering** We're seeking a **Design Verification Engineer ** for a **hybrid role** based in **Santa Clara, CA** or **Boston, MA** . This ... position focuses on **Functional Verification ** and offers an opportunity to work on cutting-edge...digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of… more
- City and County of San Francisco (San Francisco, CA)
- Department: DataSF Job class: 1043 Senior Data Engineer Salary range: $153,686/year - $193,388/year Role type: Permanent Exempt Hours: Full-time (Hybrid work ... reflect the residents we serve. DataSF is seeking a Senior Data Engineer with 3+ years of...Trainee Program may be substituted for the required degree. Verification : Please make sure it is clear in your… more
- NVIDIA (Santa Clara, CA)
- …CPU Cache Coherent Interconnects Design Team, you will be responsible for the physical design of CPU on-chip interconnect network and last-level caches, working on ... member of our CPU team, you'll be a liaison between Logic design and Physical design teams responsible for achieving timing, area, performance and power goals of the… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Make the choice and join us today! We are now looking for a Senior Photonics CAD Engineer . We are part of the global circuits team at ... across different technology nodes. + Drive efficiency improvements in design verification , physical extraction, custom rule writing (DRC/LVS), and silicon… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design engineer at NVIDIA, you'll join a group of ... of our Memory Subsystem Design team, you will collaborate with architects/design verification /formal verification / physical design team to deliver a… more
- Capgemini (San Jose, CA)
- ** Senior FPGA Engineer - Bay Area...digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of ... to accelerate their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries across sectors… more
- Microsoft Corporation (Mountain View, CA)
- …engineers so that they can deliver cutting-edge silicon solutions for Microsoft. As a Senior Front-End CAD Engineer , you'll drive the development and adoption of ... assurance checks across front-end areas like RTL & VIP Design, Design Verification , Validation, DFT, Emulation, Design Synthesis, RTL Power Anaysis, PD Handoff and… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior ASIC Design Engineer to join our Switch Silicon team. As a Design Engineer at NVIDIA, you'll join a group of hardworking ... a fully verified, synthesis/timing clean design. + Collaborate with architects, verification engineers, formal engineers, physical design engineers, and software… more
- NVIDIA (Santa Clara, CA)
- …how you can make a lasting impact on the world. We're seeking a Senior VLSI Library Methodology Engineer to architect automation that powers library modeling, ... for NVIDIA's PD flows. You'll build and integrate data‑driven pipelines and verification systems, collaborating with process and cell‑design teams to align modeling… more
- Google (Sunnyvale, CA)
- Senior DFT Static Timing Analysis Engineer , Cloud _corporate_fare_ Google _place_ Sunnyvale, CA, USA **Mid** Experience driving progress, solving problems, and ... (ie, full chip timing signoff ownership, constraint authoring and verification , full chip static timing analysis and timing ECO...projects. + Experience leading one or more aspects of physical design or physical design flow/methodology, to… more
- Capgemini (San Jose, CA)
- …and cutting-edge technologies in digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of the rest of the ... to accelerate their journey towards Intelligent Industry. Capgemini Engineering has 65,000 engineer and scientist team members in over 30 countries across sectors… more
