• Silicon Packaging Design

    Meta (Menlo Park, CA)
    **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the ... they can create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package … more
    Meta (10/18/24)
    - Save Job - Related Jobs - Block Source
  • Silicon Photonics PIC Design

    Broadcom (San Jose, CA)
    …please Sign-In before you apply.** **Job Description:** Broadcom is looking for a motivated Silicon Photonics PIC Design Engineer with excellent written and ... design , simulation, layout, testing, and system-level verification of silicon photonics components and circuits.↳ **Responsibilities:** + Collaborate with … more
    Broadcom (11/01/24)
    - Save Job - Related Jobs - Block Source
  • IC Layout Engineer ( Silicon

    SpaceX (Sunnyvale, CA)
    …includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations + Accurately estimate the schedule ... as needed to meet critical milestones COMPENSATION AND BENEFITS: Pay range: Silicon Engineer /Level II: $115,000.00 - $135,000.00/per year Your actual level… more
    SpaceX (09/25/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Packaging Engineer

    Meta (Menlo Park, CA)
    **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Mechanical/Thermal modeling focus for its ASIC packaging team to support the ... Silicon for Infrastructure as well as to develop packaging solutions that are optimal for our ASIC roadmap....part of a world-class engineering team. **Required Skills:** ASIC Packaging Engineer Responsibilities: 1. As an ASIC… more
    Meta (11/14/24)
    - Save Job - Related Jobs - Block Source
  • SiliconOne Mechanical Packaging

    Cisco (San Jose, CA)
    …customers. We are a specialized ASIC team with experts in all aspects of Silicon Design and system integration. Our substrates are using the latest fanout ... Who We Are Cisco Silicon One is a business organization building and...on all the latest technologies including optical and advanced packaging . What You'll Do Cisco SiliconOne ASIC team is… more
    Cisco (11/13/24)
    - Save Job - Related Jobs - Block Source
  • Interposer Physical Design Engineer

    Google (Sunnyvale, CA)
    …or equivalent practical experience. + 10 years of experience in ASIC physical design flows and methodologies in advanced process nodes. + Experience with routing ... routing or PnR tool routing. + Experience with layout, physical verification, Design for Manufacturability (DFM), power and signal integrity analysis using industry… more
    Google (10/29/24)
    - Save Job - Related Jobs - Block Source
  • Principal Product & Test Engineer

    Microsoft Corporation (Sunnyvale, CA)
    …**Principal Product & Test Engineer ** to work in the dynamic Microsoft Silicon Manufacturing Packaging Engineering team (SMPE). The candidate must be a ... Microsoft Silicon , Cloud Hardware, and Infrastructure Engineering (SCHIE) is...**Responsibilities** + Oversee the development, manufacturing, fabrication, testing, and packaging of semiconductor integrated circuits (ICs). + Drive pre-Si… more
    Microsoft Corporation (11/04/24)
    - Save Job - Related Jobs - Block Source
  • R&D Engineer

    Broadcom (San Jose, CA)
    …of experience in the field. **Key Qualifications** + Broad knowledge of advanced silicon and packaging process technologies + Working knowledge of the Advanced ... skills + Being able to work with large teams from manufacturing, technology and packaging **Job Description** + Provide design support for IP & ASIC to… more
    Broadcom (11/01/24)
    - Save Job - Related Jobs - Block Source
  • Chip Package Signal and Power Integrity…

    Google (Sunnyvale, CA)
    …in chip package SI/PI design for interconnections and advanced package design . Preferred qualifications: + Experience in post silicon correlation with ... models. + Experience with 2.5D/3D package design such as silicon interposer, ...integration. As a Chip Package Signal and Power Integrity Engineer you will be responsible for the chip package… more
    Google (11/12/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer II (Intern) United States

    Cisco (San Jose, CA)
    …Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed using sophisticated VLSI design ... Cisco's product line. Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of… more
    Cisco (09/14/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Engineer II (Full Time) United States

    Cisco (San Jose, CA)
    …Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed using sophisticated VLSI design ... Cisco's product line. Open-minded, driven, diverse and deeply creative people at Cisco design the hardware that makes the internet work. Bring your knowledge of… more
    Cisco (10/25/24)
    - Save Job - Related Jobs - Block Source
  • Senior Failure Analysis Engineer

    NVIDIA (Santa Clara, CA)
    Join the forefront of technological innovation at NVIDIA Silicon Failure Analysis Lab. We're seeking an expert Failure Analysis Engineer to join our diverse team ... semiconductor ICs, boards, and systems, featuring sophisticated semiconductor process and packaging technologies! What you'll be doing: + Perform and coordinate both… more
    NVIDIA (10/24/24)
    - Save Job - Related Jobs - Block Source
  • High Level Synthesis (HLS) Staff Engineer 2

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    High Level Synthesis (HLS) Staff Engineer 2 Job ID 6107 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position Overview:** The Edge ... at SLAC National Accelerator Laboratory is seeking a talented Electronics Engineer to contribute to development of state-of-the-art electronics systems used in… more
    SLAC National Accelerator Laboratory (10/03/24)
    - Save Job - Related Jobs - Block Source
  • Signal Integrity Engineer

    Meta (Menlo Park, CA)
    …2. Collaborate closely with the packaging team to review and guide package design and verify the D2D interface on silicon interposer 3. Perform signal ... reference module and next-generation System on Wafer (SOW) reference module design . **Required Skills:** Signal Integrity Engineer Responsibilities: 1. Work… more
    Meta (10/12/24)
    - Save Job - Related Jobs - Block Source
  • CPU Virtual Platforms Engineer

    Qualcomm (Santa Clara, CA)
    …Engineering Group > CPU Engineering **General Summary:** As a CPU Virtual Platforms Engineer , you will be part of CPU verification team to deliver complex ... images suitable for running on latest generations of CPUs in pre- silicon emulation platforms. **Minimum Qualifications:** * Bachelor's degree in Electrical… more
    Qualcomm (09/11/24)
    - Save Job - Related Jobs - Block Source
  • Sr. Director, Engineering

    Skyworks (San Jose, CA)
    …the company through the full life cycle of product development, including RF design , packaging , product, and test engineering + Key contributor to connectivity ... Senior Director of Engineering and the individual selected can work from our Design Center in Andover, MA (preferred); Irvine, CA; San Jose, CA; or Greensboro,… more
    Skyworks (11/05/24)
    - Save Job - Related Jobs - Block Source