- Qualcomm (Santa Clara, CA)
- …definition or Hands-on RAS design/verification is a plus + Strong knowledge in SOC infrastructure IP (NOC, Caches, SMMU, Memory Controller, Interrupt ... group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System...localize failure in the field + Strong knowledge in SOC and Infrastructure IP (NOC,… more
- Capgemini (San Francisco, CA)
- …Sunnyvale CA** **Job description:** Architect and Create verification environments using System -Verilog and UVM (Universal verification) methodology for IP ... verification. IP verification must have and SoC verification good to have. **Key responsibilities** SystemVerilog/UVM/C /Python...+ Proficiency and proven work experience in UVM & System Verilog based DV development. + Strong knowledge in… more
- Capgemini (San Francisco, CA)
- … **Required Skills:** + .Minimum 5 years of strong experience in EDA/CAD SoC / IP design verification and infrastructure development + .Proficiency in ... **Job Title: Design Verification Infrastructure Engineer** **Job Location: Sunnyvale, CA (Remote work...leads to develop software for internal solutions/generators to support SoC DV and Firmware engineers. + .Support existing DV… more
- NVIDIA (Santa Clara, CA)
- … systems architects and deep learning experts to define the next generation SoC ? NVIDIA is developing processor and system architectures that are at the ... We are looking for a Senior Hardware SoC Architect for our Tegra Team! Do you...position requires an interest in reset and boot-related chip-level infrastructure domains in SOCs. It will also require a… more
- Meta (Sunnyvale, CA)
- … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...Networking designs. 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 18. Experience with IP … more
- Meta (Sunnyvale, CA)
- … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable block/ IP /sub- system / SoC level verification 2. Develop...or SVN 16. Experience with verification of ARM/RISC-V based sub- systems or SoCs 17. Experience with IP … more
- Meta (Sunnyvale, CA)
- … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...or SVN. 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 19. Experience with IP … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our ... with industry security standards such as GDPR, HIPAA, PCI, SOC 2, and ISO 27001, working closely with the...end -to- end cloud services from the ground up. Infrastructure as Code ( IaC ) : Proficiency in… more
- Qualcomm (Santa Clara, CA)
- …processing transformation to help create a smarter, connected future for all. The infrastructure IP Team consists of a multi-disciplinary group involved in the ... definition and design of Platform infrastructure HW components such as Memory controllers, ... Performance using cycle-accurate/approximate models and support both Infra IP level u-architecture optimizations as well as System… more
- Ivalua (Fremont, CA)
- …(IIS), Networking (DNS, DHCP, TCP/ IP , Routing, Firewall, WAN, etc.), NT File System , Group Policy, RDS,SSL/TLS protocols. SOC tools: SIEM & EDR. Endpoint ... Our IT team is dedicated to manage the IT Infrastructure , Cloud computing needs and the Cloud infrastructure...scope (mainly as backup of the primary US based SOC analyst) + Assist with system builds… more
- Meta (Sunnyvale, CA)
- …Frequency Scaling(DVFS), AVS 16. Experience architecting systems for various design scales ( IP blocks, SOC , multi-chip system ) with an understanding of ... Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level. We are...around EDA tools, and low-power design to build efficient System on Chip ( SoC ) and IP… more
- Meta (Sunnyvale, CA)
- …methodologies, implementation, and verification to build best-in-class System on a Chip ( SOC ) and IP for data center applications. We are looking for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test (DFT)...in Design for Testability (DFT) methodologies and implementation for IP / SOC , with a deep understanding of Siemens/Synopsys… more
- Meta (Sunnyvale, CA)
- …implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ( SoC ) and IP for data center applications. ... Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience...drive execution. 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and… more
- Meta (Sunnyvale, CA)
- …designs. 16. Experience in architecting emulation systems for various design scales ( IP blocks, SOC , multi-chip system ) with an understanding of ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We are looking for individuals with experience...experience in HW emulation and prototyping required to build System on Chip ( SoC ) and IP… more
- Meta (Sunnyvale, CA)
- …skills to implement the testing infrastructure to validate new core IP or SoC implementations. You will work closely with researchers, architects ... SystemVerilog, C/C++ based verification and UVM methodology. 9. 3+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog… more
- Capgemini (San Francisco, CA)
- …using python. . Experience in post-silicon bring-up and flows for SoC like IP . Experience with lab system debug with logic analyzers, scopes, meters, etc ... of at least 5 developers. . Experience running tests on FPGA and/or Emulation platforms for SoC level or IP level. . Experience in power tests and evaluation on… more
- Capgemini (San Francisco, CA)
- …using python. + Experience in post-silicon bring-up and flows for SoC like IP . Experience with lab system debug with logic analyzers, scopes, meters, etc ... of at least 5 developers. + Experience running tests on FPGA and/or Emulation platforms for SoC level or IP level. + Experience in power tests and evaluation on… more
- Capgemini (San Francisco, CA)
- …using python. Experience in post-silicon bring-up and flows for SoC like IP Experience with lab system debug with logic analyzers, scopes, meters, etc ... and develop/debug firmware Work closely with members of the System Validation, Software, Firmware, Hardware teams to complete the...Experience running tests on FPGA and/or Emulation platforms for SoC level or IP level. Experience in… more
- Meta (Sunnyvale, CA)
- …SystemVerilog/UVM methodology and/or C/C++ based verification. 11. 10+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... vendor netlists. 4. Implement scalable power aware simulation and gate level simulation infrastructure leveraging test benches in System Verilog. 5. Keep track… more
- Meta (Sunnyvale, CA)
- …SystemVerilog, C/C++ based verification and UVM methodology. 10. 5+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations and contribute to… more