• ASIC Design for Test

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
    Cisco (11/15/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the… more
    Cisco (11/01/24)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    …subsystems + RTL design of digital circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of ... This position will challenge you! The Senior ASIC Engineer will work on complex ASIC...+ Work with Verification Engineers to develop specifications and test plans. Ensure robust design and complete… more
    Tarana Wireless (11/02/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification and ... ASIC bring up Minimum Qualifications * 10+ years ASIC design verification experience with a Bachelor's... verification using UVM/System Verilog. * Prior experience building test benches from scratch, hands on experience with System… more
    Cisco (10/03/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL...Design -for- Test . You will work with Front-end RTL teams, backend...for thorough test planning and development of test benches to verify comprehensive Design -for- Test more
    Cisco (10/19/24)
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  • ASIC DFT Technical Program Manager

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in… more
    Cisco (11/14/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... You'll Do * Would be working to validate system architecture and design implementation micro-architecture to make sure final products would meet performance… more
    Cisco (10/23/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test , floorplanning, place and route, clock ... power planning and analysis, timing closure, STA, signal integrity and physical design checks. + Participate in large complex design implementations using… more
    Broadcom (11/08/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test , floorplanning, place and route, clock ... methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design implementations using… more
    Broadcom (11/01/24)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    …creativity and intelligence! In this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own all tasks involved ... based on architecture and microarchitectural specs. Drive testplan reviews with design /architecture teams. + Develop testbenches and checkers based on UVM… more
    NVIDIA (10/22/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... Working with the WiFi algorithm and systems team to design and test advanced WiFi functionalities such...Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
    Qualcomm (09/25/24)
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  • Sr.Staff SoC Lead design verification…

    Qualcomm (Santa Clara, CA)
    …Summary:** As a Design Verification Lead, you will lead a team of ASIC design verification engineers to verify IP and Subsystems that be integrated in ... strategies) to continuously push the quality and efficiency of test benches + Act as a technical ...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
    Qualcomm (10/29/24)
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  • Analog/mixed-signal IC Design Engineer…

    Cisco (San Jose, CA)
    …with other Acacia mixed-signal engineers to collaborate in order to provide an optimized design that will integrate into the ASIC . In addition, you will have ... do: * As a member of the Mixed Signal Design team, you will be a key member of...Validation: -Solid ESD laboratory practices and methodology -Construction of test setup to test specific circuitry Software… more
    Cisco (11/14/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …Who You'll Work With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on ... Design -for- Test . You will work with Front-end RTL...Design -for- Test . You will work with Front-end RTL teams, backend...activities. What You'll Do You will be part of ASIC physical design Team which is responsible… more
    Cisco (10/23/24)
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  • Principal System Design

    Western Digital (Milpitas, CA)
    …architecture + Multi-disciplinary experience, including familiarity with Firmware, HW, and ASIC design + Experience with scripting automation using Python ... ASIC , HW, Firmware, and Validation teams to navigate technical challenges and identify the most beneficial solutions. +...design changes to meet them. + Deliver product design specification documents and test objectives. +… more
    Western Digital (11/16/24)
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  • Senior Technologist, Systems Design

    Western Digital (Milpitas, CA)
    …systems architecture + Multi-disciplinary experience, including familiarity with Firmware, HW, and ASIC design PREFERRED: + Knowledge of PCIe Gen5/6 technology ... ASIC , HW, Firmware, and Validation teams to navigate technical challenges and identify the most beneficial solutions. You...design changes to meet them. + Deliver product design specification documents and test objectives. +… more
    Western Digital (11/16/24)
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  • Senior Technologist, Systems Design

    Western Digital (Milpitas, CA)
    …/ embedded systems architecture + Multi-disciplinary experience, including Firmware, HW, and ASIC design **PREFERRED:** + Knowledge of PCIe Gen5/6 technology is ... ASIC , HW, Firmware, and Validation teams to navigate technical challenges and identify the most beneficial solutions. You...design changes to meet them. + Deliver product design specification documents and test objectives. +… more
    Western Digital (11/16/24)
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  • Senior Staff Engineer, Electrical Design

    Renesas (San Jose, CA)
    …ECOs on RTL, synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design ... timing and logic equivalent checking + Creating documentation targeting design , verification, and test groups + Assisting...communications skills + 8+ years of direct experience in ASIC /IC design with deep knowledge of whole… more
    Renesas (11/09/24)
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  • Semiconductor Reliability Test Engineer

    Micross Components (Milpitas, CA)
    …playing a key role in these evolutions. Summary: The Semiconductor Reliability Test Engineer will provide technical support to STS' Environmental Screening ... area which includes thermal shock, temperature cycle, acceleration test , PIND test , fine/gross leak, burn-in, HTOL, HAST, CSAM, salt atmosphere, solderability,… more
    Micross Components (11/13/24)
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  • Hardware (CPU, GPU, SoC, Digital Design

    Qualcomm (Santa Clara, CA)
    Design (micro-architecture, modeling, RTL), Implementation (synthesis & timing constraints), Design -for- Test (DFT), Physical Design (Place & route, CTS, ... professional experience in one or more of the following technical tracks: **_GPU_** + Engineering design and...scalable and portable environment + Develop verification plans and test benches + Execute verification plans, including design more
    Qualcomm (11/19/24)
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