- Broadcom (San Jose, CA)
- …PhD in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical ... Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at the… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer**... and software to support the convergence of the physical and digital worlds. Coupled with the ... US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_… more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...develop innovative technology, and to power a more inclusive, digital future for everyone. How do we do it?… more
- NVIDIA (Santa Clara, CA)
- …System-Verilog, with a good understanding of Computer Architecture and Digital Systems design . + A deep understanding of ASIC design flow including ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design...synthesis/timing clean design while working with the physical design team to ensure a routable… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …basis to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * ... Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL... Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture specifications and participate in reviews… more
- Cisco (San Jose, CA)
- …processor architecture, Ethernet processing, digital signal processing, high-speed logic design & verification, memory designs, and physical design ... and efficient memory designs, custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology.… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC DFT Technical Program Manager in San Jose, CA...and post silicon validation phases with additional exposure to physical design signoff activities. Who You Are… more
- Cisco (San Jose, CA)
- …strategies, and correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. * Additionally, you'll develop ... accuracy. Who you'll work with You will collaborate with ASIC Front-end and Back-end teams to understand chip architecture...refining design and timing constraints for seamless physical design closure. As part of this… more
- Cisco (San Jose, CA)
- …testing some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex ... multi-hierarchy designs, ensuring robust physical design processes like logic synthesis and...design of an end-to-end IP or integration of ASIC /SoC design . * Design custom… more
- Qualcomm (Santa Clara, CA)
- …for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions in our SOC and core design team. As ... be part of a team responsible for the complete Physical Design Flow and deliveries of complex,...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Western Digital (Milpitas, CA)
- …architecture + Multi-disciplinary experience, including familiarity with Firmware, HW, and ASIC design + Experience with scripting automation using Python ... **Company Description** At Western Digital , we are on a mission to unlock...schedule tradeoffs. + This role requires close collaboration with ASIC , HW, Firmware, and Validation teams to navigate technical… more
- Western Digital (Milpitas, CA)
- …systems architecture + Multi-disciplinary experience, including familiarity with Firmware, HW, and ASIC design PREFERRED: + Knowledge of PCIe Gen5/6 technology ... **Company Description** At Western Digital , our vision is to power global innovation...and schedule tradeoffs. This role requires close collaboration with ASIC , HW, Firmware, and Validation teams to navigate technical… more
- Western Digital (Milpitas, CA)
- …/ embedded systems architecture + Multi-disciplinary experience, including Firmware, HW, and ASIC design **PREFERRED:** + Knowledge of PCIe Gen5/6 technology is ... **Company Description** At Western Digital , we are on a mission to unlock...and schedule tradeoffs. This role requires close collaboration with ASIC , HW, Firmware, and Validation teams to navigate technical… more
- Renesas (San Jose, CA)
- … designs and writing device-level or sub-system specifications + Experience in digital design implementation including logical synthesis and DFT insertion with ... route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must +...support is a plus + Experience in DFT or physical design is a plus + Experience… more
- Broadcom (San Jose, CA)
- …experience._ + Good knowledge of ARM subsystem + Good knowledge of high speed digital circuit design . + Good knowledge of digital upsampling/downsampling + ... This opening is for working on chips that enable Physical Layer Products for High Speed Optical Communication. +...network. + Good knowledge on FEC (Forward Error Correction) design . + Good knowledge of digital signal… more
- Western Digital (Milpitas, CA)
- …ensuring alignment with industry standards and customer needs. + Working closely with the Design , Verification, DFT and Physical Design teams while guiding ... **Company Description** At Western Digital , our vision is to power global innovation...architecture convergence in complex semiconductor designs. + Proficiency in ASIC design tools, simulation methodologies, and hardware… more
- NVIDIA (Santa Clara, CA)
- …would love to hear from you! We are looking for a Senior Mask Layout Design Engineer, someone who is excited to join a growing and multifaceted group of individuals ... What you'll be doing: + Lead and implement IC physical layout for mixed-signal functions like high speed SerDes,...for mixed-signal functions like high speed SerDes, Analog to Digital & Digital to Analog converters, Bandgaps,… more
- NVIDIA (Santa Clara, CA)
- …is our life's work, to amplify human creativity and intelligence. Are you a Mask Layout Design Engineer? If yes, We would love to hear from you! We are looking for a ... Senior Mask Layout Design Engineer, someone who is excited to join a...mixed-signal circuit designs. What you'll be doing: + Performing physical layout for mixed-signal functions like PLL's, high speed… more