• ASIC Package Signal

    Cisco (San Jose, CA)
    power , speed, and fabrication / assembly technology. You will drive ASIC package power and signal integrity rules and layout analysis to enable ... ASIC team is looking for an expert in Signal and Power Integrity to help us... Integrity to help us develop our next generation ASIC packaging . You will work on cutting-edge… more
    Cisco (01/07/25)
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  • ASIC Engineer II (Full Time) United States

    Cisco (San Jose, CA)
    …custom library development (Standard Cell and I/O), physical design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed ... a relevant position opens. Who You'll Work With The ASIC Group works closely with other development teams within...Relevant courses include Computer Architecture, Logic Design, VLSI, Programming, Signal and Power Integrity, and DFx. *… more
    Cisco (11/18/24)
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  • Assistant Professor - Electrical Engineering:…

    San Jose State University (San Jose, CA)
    signal processing, network and network security, mobile network, power electronics, energy systems, microprocessors and computer systems, embedded systems, ... Assistant Professor - Electrical Engineering: ASIC , SOC, AI/ML Hardware & Embedded Systems Design Apply now… more
    San Jose State University (11/21/24)
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  • ASIC Implementation Engineer

    Broadcom (San Jose, CA)
    …expertise in multiple disciplines including Floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and ... supervision. **Experience:** + Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in Electrical Engineering or Computer Engineering… more
    Broadcom (11/11/24)
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  • ASIC Digital Physical Design Engineer

    Broadcom (San Jose, CA)
    …Desired Qualifications: - Understanding of backend Cadence tools. - Deep understanding of Signal Integrity and Power Integrity for High Speed designs. - ... place and route. + Experience in developing and implementing Power -grid and high speed clock constraints and specification. +...of parasitic delays. + Understanding and experience of mixed signal environments is a must. + Candidates must be… more
    Broadcom (11/01/24)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in a dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit. What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (12/11/24)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    …MATLAB or similar tools. + Opportunity to work in dynamic cross-functional role to optimize package , PCB, ASIC , mixed signal circuit What we need to see: ... We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA...a system level timing or loss budget including silicon, package and board impairments. + Familiarity with use of… more
    NVIDIA (12/06/24)
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  • Signal Integrity Engineer

    Cisco (San Jose, CA)
    …* Perform pre- and post-route signal integrity analysis of both PCB and ASIC package designs. * Write signal integrity design guidelines, test plan, ... the definition and design of current and next generation ASIC , package , printed circuit board (PCB), and...signal integrity challenges on system high-speed interconnections, clock, power , etc. * Work closely with other hardware function… more
    Cisco (12/04/24)
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  • Analog/mixed- signal IC Design Engineer…

    Cisco (San Jose, CA)
    …* You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met. Who you'll work with: * You ... plus: Passive component design: inductors, -transformers, transmission-lines, etc. -Floorplanning ( power /ground, digital/analog signal routing, etc.) -Custom transistor… more
    Cisco (01/07/25)
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  • RF/Analog Design/Mixed- Signal Engineering…

    Qualcomm (Santa Clara, CA)
    …optimization, RFIC / Analog IC Design, PA architectures, RF Front-End Engineering, Signal Processing/Integration, RF microwave design, power amplifiers, WLAN / ... Board design + Electrical system analysis and modeling + Signal and power integrity (SIPI) analysis +...Serdes, DDR, etc.) architecture definition, design, implementation (using standard ASIC flow), and SoC integration + RTL coding, lint… more
    Qualcomm (11/19/24)
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  • Analog Mixed- Signal Design Engineer

    Broadcom (San Jose, CA)
    …including EDA integration, foundry PDK and associated collaterals. + Deep understanding of signal integrity and power integrity for high-speed designs. + Good ... is looking for a Principal level high speed analog mixed- signal desgn engineer. Qualifications include: + MS in Electrical...3nm technologies. + Experience in designing low jitter, low power PLL, VCO and clocking circuitry in advanced CMOS… more
    Broadcom (12/03/24)
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  • System Signal Integrity Engineer

    Broadcom (San Jose, CA)
    …presentations and written documents + Determine and document applicable requirements for ASIC package and PCB designs, drawing from industry standards, customer ... Support 5G base station ADC/DAC applications + System level Signal and Power Integrity design trade-offs and...+ Pre-layout and post-layout modeling and simulation to support package and PCB engineering for signal integrity… more
    Broadcom (11/22/24)
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  • Analog Mixed- Signal Design Engineer

    Broadcom (San Jose, CA)
    …nodes such as 5nm and 3nm FinFET is a must. + Deep understanding of signal integrity and power integrity for high-speed designs. + Good understanding of design ... Broadcom is looking for a highly motivated high-speed analog mixed- signal designer. You will be responsible to develop analog...and distribution. + Experience in designing low jitter, low power PLL, VCO and clocking circuitry in advanced CMOS… more
    Broadcom (11/22/24)
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  • Technologist - Analog/Mixed- Signal CAD…

    Western Digital (San Jose, CA)
    …and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes. + Solid understanding of PDK's, effectively ... **Company Description** At Western Digital, our vision is to power global innovation and push the boundaries of technology...and support within the CAD / IT-team for all ASIC designers worldwide. + Managing the quality and ISO26262… more
    Western Digital (11/16/24)
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  • Advanced IC Package Designer

    Cisco (San Jose, CA)
    …and design rules, optimized to meet stringent Signal Integrity and Power Integrity rules * Implement package routing with fabrication/assembly aware approach ... ASIC team is looking for an advanced IC package designer to help us develop our next generation...PCBs * Familiarity with AutoCAD * Working knowledge of Signal and Power Integrity fundamentals #WeAreCisco #WeAreCisco… more
    Cisco (12/20/24)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …high speed/density ASIC packages. + Perform substrate breakout patterns for ASIC packages. + Optimize package pinout incorporating system level trade-offs of ... pins assignment. + Help perform package routing, placement, stack-up, reference plane and ...Manager) + Your validated working knowledge of high-speed design signal integrity practices + Experience using Valor is helpful… more
    NVIDIA (11/22/24)
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  • Package Design Engineer

    Broadcom (San Jose, CA)
    …for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership ... in flip-chip-BGA package design, including high-speed SerDes . Knowledge of package -level signal integrity and power integrity, to apply to package more
    Broadcom (11/20/24)
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  • SiliconOne Electrical Validation Lead

    Cisco (San Jose, CA)
    …be cooperating with various groups across the globe such as: Board-Design, Software, Signal and Power Integrity, Packaging and Production. Minimum ... role, you will be responsible for Cisco SiliconOne Switch ASIC Post-Silicon Electrical Validation. You will deal with all...join our Cisco SiliconOne group, the center of Cisco's ASIC design. We are redefining the industry and building… more
    Cisco (10/24/24)
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  • Physical Design Engineer

    Qualcomm (Santa Clara, CA)
    …to help create a smarter, connected future for all. QCTs Digital ASIC Team is actively seeking candidates for several physical design engineering positions ... responsible for the complete Physical Design Flow and deliveries of complex, high-speed, low power designs such as GPU, Camera and other MM, DDR, Modem, Audio .… more
    Qualcomm (10/29/24)
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  • Principal Silicon Validation and Verification…

    Broadcom (San Jose, CA)
    …of various control loops such as PLLs, LDOs. + Deep understanding of signal integrity and power integrity for high-speed designs and experience with ... will perform post silicon validation and characterization of high-speed analog and mixed- signal blocks; and you will collaborate with cross functional teams to… more
    Broadcom (12/25/24)
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