• Digital IC Implementation

    Cadence Design Systems, Inc. (San Jose, CA)
    …Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required Prior experience with IC digital implementation flows and backend EDA tools ... Science/Engineering, Electrical, Engineering, or related field Prior experience with IC digital implementation flows and back-end EDA tools including… more
    Cadence Design Systems, Inc. (10/05/24)
    - Save Job - Related Jobs - Block Source
  • STA/Emir IC Principal Solutions…

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovative and enthused with how to help customers, solve their toughest Digital Implementation problems using Cadence technology. Will drive Pre-sales and ... Post-sales activities at advanced nodes for Cadence Digital IC products. The qualified candidate will have hands-on experience with Timing, Emir,… more
    Cadence Design Systems, Inc. (10/18/24)
    - Save Job - Related Jobs - Block Source
  • ASIC Digital Design Engineer - WiFi MAC

    Qualcomm (San Jose, CA)
    …to help create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and ... requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and… more
    Qualcomm (09/23/24)
    - Save Job - Related Jobs - Block Source
  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and ... experience to define, model, design ( digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high… more
    Qualcomm (09/25/24)
    - Save Job - Related Jobs - Block Source
  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …(802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/ Implementation , power estimates and power reduction techniques. **Minimum ... design through the full ASIC development process from specification, RTL implementation , verification, synthesis, timing closure, emulation and post silicon bring… more
    Qualcomm (10/10/24)
    - Save Job - Related Jobs - Block Source