- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world! We are now looking for an Low Power Design/Verification ASIC Engineer - New College Grad 2026. We continue to rapidly ... to deliver exceptional perf/watt solutions in a wide range of sectors. Come join NVIDIAs Low Power DV team to develop state of the art GPUs to power AI,… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... What you'll be doing: + You will drive physical design of high-frequency and low - power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level,… more
- Broadcom (San Jose, CA)
- …PPA tradeoffs involved amongst various library components, and architectures + Knowledgeable in low power design and power management + Hands-on experience ... industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams designing challenging chips in areas such as AI, HPC,… more
- NVIDIA (Santa Clara, CA)
- …of concepts of energy consumption, estimation, data movement and low power design. + Familiarity with Verilog and ASIC design principles, including ... We are now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA...Our team is responsible for analyzing fullchip and unit-level power data, and driving ASIC teams to… more
- NVIDIA (Santa Clara, CA)
- …What you'll be doing: + Build roadmaps of memory system-level features to address low power , low noise, perf/watt efficient, and stable/reliable product ... or high-perf systems. + Strong fundamentals in EE, digital/analog design, signal integrity, low power design, memory power management techniques, timing… more
- NVIDIA (Santa Clara, CA)
- …a member of this team, you are responsible for developing and validating system level low power features with a deep understanding of products needs that will ... you will be doing: + Bring up system level low power features to address existing and...lab tools (oscilloscopes, multimeters, logic analyzers). + Experience with ASIC power saving features and methods +… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** **System Signal/ Power Integrity Engineer ** _Responsibilities_ + Support high data rate ... + Power Integrity Concepts: PDN impedance analysis and design, ultra- low impedance measurements, understanding of SMT capacitor performance metrics, use of CPA… more
- NVIDIA (Santa Clara, CA)
- …Good understanding of mathematics/physics fundamentals of electrical design. + Clear understanding of low power design techniques such as multi VT, Clock gating, ... intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's...Work on various aspects of STA, constraints, timing and power optimization. What We Need To See: + MS… more
- NVIDIA (Santa Clara, CA)
- …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, ... are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...understanding of fundamental concepts of energy consumption, estimation, and low power design. + Desire to bring… more
- Cisco (San Jose, CA)
- …the DSP and ASIC teams is key to optimizing performance and power efficiency. You'll contribute to system design, develop architectures, and support ASIC ... FEC, and modeling, you help the team to develop the next generation of low - power and high-performance coherent transceivers. Here are some examples of possible… more
- Cisco (San Jose, CA)
- …technology rollout in the networking industry associated with ASIC facilitating ASIC infrastructure, low power system design, innovative cooling and ... dynamic and quality expectation with web-scale customers. Your Impact Product Quality Engineer will own and drive New Product Introduction Quality, Factory Quality… more
- Broadcom (San Jose, CA)
- …utilizing low -loss PCB materials. + Oversee the design and implementation of high- power , low -noise analog power systems, DDR interfaces, and other ... boards using cutting-edge Broadcom SOCs. We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design to join our dynamic team at… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …in one or more of these areas: + Synthesis, DFT, Logical Equivalency Checking + Low Power Design Implementation, SDC Verification + Place and Route + Parasitic ... on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job...Static Timing Analysis) + Debug and resolve complicated PPA, Low Power implementation and TAT issues. +… more
- Cisco (Milpitas, CA)
- …crypto accelerators and network processing units, to deliver exceptional throughput, low latency, and robust security features. **Your Impact** We are looking ... for a skilled and proactive FPGA Design Engineer with 3+ years of industry experience to manage...designs for performance (high clock speed), area utilization, and power consumption, particularly for large, resource-intensive blocks (eg, DSP… more
- Cisco (San Jose, CA)
- …cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Operating at the forefront of technology, we ... work with cutting-edge, high-speed, and power -hungry devices. Our small, but highly influential team thrives in this challenging environment, leveraging our… more
- NVIDIA (Santa Clara, CA)
- We have an exciting opportunity for a talented Senior System Software Engineer to join our dynamic Automotive Team and help us develop innovative, secure, and ... automakers, tier-1 suppliers, automotive research institutions, and start-ups the power and flexibility to develop and deploy breakthrough artificial intelligence… more
- NVIDIA (Santa Clara, CA)
- …members on the new process design challenges, have the chance to create novel low power and high performance circuits, and develop in-house design and ... level circuit design, modeling and performance analysis process and optimize design for power , timing, area and yield + You'll make the layout floorplan and work… more