• Senior Package Layout

    NVIDIA (Santa Clara, CA)
    …problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a ... using Cadence APD or SiP tool suite. + Propose layout design trade-offs to the Technical Package ...Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. + Conduct design… more
    NVIDIA (03/06/25)
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  • Senior Engineer , Package

    MetaOption, LLC (Milpitas, CA)
    Senior Engineer , Package Design We need...* Packaging routing analyst, trace impedance analyses and package layout bump to ball analyses * ... for package level modeling/extraction/simulation * Ability to work with Package Layout engineers. * Strong presentation and communication skills Preferred… more
    MetaOption, LLC (03/17/25)
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  • Senior Mask Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Mask Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the ... and highly motivated engineers to work on the physical layout design and development of our next generation custom...reporting skills With competitive salaries and a generous benefits package , NVIDIA is widely considered to be one of… more
    NVIDIA (02/21/25)
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  • Senior Signal Integrity Design…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal Integrity Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... + SI model correlations using lab measurements to improve modelling tool/methodology. + Package substrate and board layout SI design constraint creation, review… more
    NVIDIA (01/22/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... measurements and/or modelling tool/methodology updates. + Substrate and board layout SI guidelines creation, review and post layout...to work in a dynamic cross-functional role to optimize package , PCB, ASIC, mixed signal circuit. What we need… more
    NVIDIA (03/12/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... PCB stack up design, material selection, design guide implementation, layout review, and post- layout analysis. + System-level...delivery network (PDN) on PCBs. + Work closely with Package and PCB Design teams crafting solutions for system… more
    NVIDIA (03/11/25)
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  • Senior Staff Engineer , Signal…

    Celestica (San Jose, CA)
    …United States State/Province: California City: San Jose **Summary** Signal integrity engineer provides design guideline and support to system architecture design, ... board layout , product bring up, debug, validation, and factory builds....and makes design adjustments as needed. The Signal integrity engineer works in cross functional teams with other designers,… more
    Celestica (03/14/25)
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  • Senior Signal Integrity Engineer

    Palo Alto Networks (Santa Clara, CA)
    …and their compliance to internal specs and standards + Create and verify module/ package and PCB layout rules: perform pre- and post-route signal integrity ... modeling PDN networks; defining PCB routing constraints; reviewing PCB layout ; developing test plans; performing hands-on measurements to validate critical… more
    Palo Alto Networks (03/18/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... systems. + Work closely with VLSI power teams and package /board design teams to design, optimize, and model power... and board PDN guidelines creation, review, and post layout PI extractions. + Opportunity to work in a… more
    NVIDIA (03/14/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... Opportunity to work in dynamic cross-functional role to optimize package , PCB, ASIC, mixed signal circuit What we need...SIWAVE or similar. + Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based… more
    NVIDIA (03/07/25)
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  • Senior Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer ... + Ability to interpret system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Preferences will be given to… more
    Power Integrations (01/08/25)
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  • Senior FPGA Design Engineer

    Applied Materials (Santa Clara, CA)
    …Specify the development of design or modify engineering assemblies, layout /schematics and/or detailed drawings/specifications of complex scope Interfaces with ... equity of our current team members. In addition to a comprehensive benefits package , candidates may be eligible for other forms of compensation such as participation… more
    Applied Materials (01/29/25)
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  • Server DRAM Engineer

    Qualcomm (Santa Clara, CA)
    …meet server-grade performance, reliability, and scalability standards. + Define and manage packaging and PCB layout constraints tailored for data center server ... software, reference designs, user guides, SDKs, and more. **Position: Server DRAM Engineer ** We are seeking an experienced **Server** **DRAM Engineer **… more
    Qualcomm (03/07/25)
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  • Photonic IC Design Engineer

    Applied Materials (Santa Clara, CA)
    …integrated products of the connectivity solutions for Applied Materials. It is a senior engineer that initiates initial blueprints of the products & solutions ... The Photonic IC Design Engineer is responsible for the design of high-speed...optical) for high speed architectures. + Create schematics and layout circuits. + Work with test and firmware engineering… more
    Applied Materials (03/13/25)
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  • Sr. Design Engineer - Transmission Line

    ENTRUST Solutions Group (San Ramon, CA)
    **Description** ** Senior Design Engineer - Transmission Line** **Location:** California or Hawaii **About the Role:** Join our dynamic team as a Senior ... as-built, and submittal purposes. + Perform engineering tasks including layout , planning, directing, training, and coordinating civil/structural analysis. + Conduct… more
    ENTRUST Solutions Group (02/20/25)
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  • Field Engineer - Northern California

    Kiewit (Milpitas, CA)
    …**Market:** Transportation **Employment Type:** Full Time **Position Overview** As a Field Engineer , you bring your big ideas, commitment to top quality and ... work packages + Assist in field surveying and work layout support including elevation, control points, and compilation of...areas and bringing them to the attention of the Senior Estimator + Complete material and quantity takeoffs according… more
    Kiewit (01/14/25)
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  • Facilities Engineer

    Fujifilm (Santa Clara, CA)
    **Position Overview** The Facilities Engineer IV plans facilities changes for plant, office, and production equipment layouts, working toward economy of operation, ... Coordinates with architecture/engineering firms in developing design criteria and preparing layout and detail drawings. Prepares bid sheets and contracts for… more
    Fujifilm (01/16/25)
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  • Failure Analysis Engineer

    Power Integrations (San Jose, CA)
    The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer issues. Job ... Min. 8 years of experience as a failure analysis engineer in a semiconductor company. + Experience in failure...system level schematics, the IC level schematics, and IC layout of CMOS and bipolar devices is required. Power… more
    Power Integrations (02/25/25)
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