• Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
    NVIDIA (11/01/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
    NVIDIA (11/01/24)
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  • Senior Physical Design

    NVIDIA (Santa Clara, CA)
    …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
    NVIDIA (11/06/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
    NVIDIA (09/18/24)
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  • Senior CPU Implementation…

    NVIDIA (Santa Clara, CA)
    …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
    NVIDIA (09/14/24)
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  • Senior Power Methodology

    NVIDIA (Santa Clara, CA)
    Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical Design teams to study and implement energy modeling techniques ... energy usage in graphics and AI workloads and make improvements in architecture, design , and power management. What you'll be doing: + Define and implement tools… more
    NVIDIA (10/17/24)
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  • Senior Clocks Methodology Engineer

    NVIDIA (Santa Clara, CA)
    … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
    NVIDIA (10/22/24)
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  • Senior ASIC Physical Design

    Capgemini (Santa Clara, CA)
    **Job Title : Senior ASIC Physical Design Engineer** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
    Capgemini (10/16/24)
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  • Senior Physical Design

    Broadcom (San Jose, CA)
    …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
    Broadcom (11/01/24)
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  • Senior ASIC Physical Design

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
    NVIDIA (09/27/24)
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  • Senior Staff Engineer, Electrical…

    Renesas (San Jose, CA)
    …RTL, synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design constraints ... Senior Staff Engineer, Electrical Design Job...support is a plus + Experience in DFT or physical design is a plus + Experience...plus + Experience in DFT or physical design is a plus + Experience with Verilog and/or… more
    Renesas (11/09/24)
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  • Senior E/E & Semiconductor Engineer…

    Capgemini (Santa Clara, CA)
    **Job Title:** ** Design Verification Engineer** **Job Location: Santa Clara CA** **Job description:** *Architect and Create verification environments using ... System-Verilog and Universal verification methodology -UVM IPs and SoCs with embedded CPUs and analog...and Gate simulations and resolve them by working with design engineers. * Create low power testcases using UPF… more
    Capgemini (09/14/24)
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  • Digital Payments Senior Product Manager

    Zoom (San Jose, CA)
    …as a liaison between business stakeholders and engineering + Expert with scrum methodology - capturing design , business, and web development requirements; and ... can expect Zoom Video Communications is hiring a Payments Senior Product Manager to drive eCommerce solutions for zoom.us,...of product managers supported by legal, FP&A, data science, design and engineering counterparts. We work in a Scrum… more
    Zoom (11/15/24)
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  • Senior Silicon Engineering

    Microsoft Corporation (Santa Clara, CA)
    …(DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a ** Senior Silicon Engineer** . You will join our front-end silicon team and be ... Integrated Circuit (ASIC) System on Chip (SOC) using Universal Verification Methodology (UVM)/C test bench + Perform Pre-Silicon SoC verification, Post-Silicon/… more
    Microsoft Corporation (11/12/24)
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  • Senior Synthesis Flow CAD Engineer

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
    NVIDIA (11/02/24)
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  • Senior DFT Engineer

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... entire Implementation flow and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do * Responsible for… more
    Cisco (10/17/24)
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  • Senior Critical Environment Technician

    Microsoft Corporation (Santa Clara, CA)
    As a Senior Critical Environment Technician (SCET) in Microsoft's Cloud Operations & Innovation (CO+I) team, you will help to maintain the critical infrastructure ... engine that powers our cloud services. As a CO+I Senior Critical Environment Technician, you will perform a key...sustainability and optimization at the forefront of our datacenter design and operations, we continue to grow and evolve… more
    Microsoft Corporation (11/06/24)
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  • Senior Product Quality Engineer

    NVIDIA (Santa Clara, CA)
    …(New Product Introduction) stage of data center products, identify and resolve any design weakness, quality issues that may arise, continuously work on the quality ... issues - Perform PCB-level analysis to isolate faults for physical FA on NVIDIA Data Center Compute Modules. +...complex problems + Continuously develop sophisticated analysis tools and methodology to screen identified failure modes and expand FA… more
    NVIDIA (10/14/24)
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  • CAD - DV Emulation Engineer, Sr. Staff

    Qualcomm (Santa Clara, CA)
    …Responsibilities:** * Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design to develop ... a CAD Engineer focusing on the DV & Emulation methodology and support, you will work with RTL, architecture,... and support, you will work with RTL, architecture, design , DV, software and silicon verification users. Interfaces with… more
    Qualcomm (08/24/24)
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  • Teamcenter Solution Architect - Electronics,…

    Siemens Digital Industries Software (Fremont, CA)
    …+ Run workshops to implement the Solution Definition portion of Siemens Delivery methodology . + Optimally communicate design direction to team members and ... Digital Industries Software is a leading provider of solutions for the design , simulation, and manufacture of products across many different industries. Formula 1… more
    Siemens Digital Industries Software (10/30/24)
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