• Sr . ASIC Design

    SpaceX (Irvine, CA)
    Sr . ASIC Design Engineer (Silicon...and learning new skills COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer / Senior : ... make this possible, with the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
    SpaceX (11/16/24)
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  • Sr . SOC/ ASIC Physical…

    SpaceX (Irvine, CA)
    Sr . SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR . SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $160,000.00 - $220,000.00/per… more
    SpaceX (11/15/24)
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  • Sr . ASIC Design Verification…

    SpaceX (Irvine, CA)
    Sr . ASIC Design Verification Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR . ASIC DESIGN VERIFICATION ENGINEER (SILICON...changing needs and requirements COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $160,000.00… more
    SpaceX (10/17/24)
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  • Sr . Principal Engineer ASIC

    Northrop Grumman (Manhattan Beach, CA)
    …The selected candidate will become an ASIC /FPGA Design and Verification Engineer at the Sr . Principal Level. The qualified applicant will work on digital ... may include, but not limited to: + Development of ASIC /FPGA architecture based on requirements + Development of RTL.../FPGA architecture based on requirements + Development of RTL Design for digital systems + Perform simulation and emulation… more
    Northrop Grumman (11/23/24)
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  • Sr . DDR IP Design Engineer

    SpaceX (Irvine, CA)
    Sr . DDR IP Design Engineer ...to support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC /FPGA Design Engineer / Senior : $160,000.00 ... the ultimate goal of enabling human life on Mars. SR . DDR IP DESIGN ENGINEER ...will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design , validation, product engineering, ASIC implementation). In… more
    SpaceX (10/21/24)
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  • Sr . SOC/ ASIC Timing Signoff…

    SpaceX (Irvine, CA)
    Sr . SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... of enabling human life on Mars. SR . SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER ...design and timing closure + Deep understanding of ASIC design flow, top-down and bottom-up … more
    SpaceX (11/22/24)
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  • Sr . SerDes Characterization and Validation…

    SpaceX (Irvine, CA)
    …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: ASIC /FPGA Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual ... Sr . SerDes Characterization and Validation Engineer ...specific to space applications + Work closely with the ASIC design team to add/improve testability and… more
    SpaceX (10/11/24)
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  • Sr . IC Layout Engineer (Silicon…

    SpaceX (Irvine, CA)
    …who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification, post-silicon validation, ... Sr . IC Layout Engineer (Silicon Engineering)...meet critical milestones COMPENSATION AND BENEFITS: Pay range: Silicon Engineer / Senior : $130,000.00 - $180,000.00/per year Your actual… more
    SpaceX (12/03/24)
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  • R&D Engineer Adv Tech Dev (PKE) / Sr

    Broadcom (Irvine, CA)
    …you apply.** **Job Description:** Work with business unit marketing and IC design teams to select the optimum package solution on cost, performance, ... (5nm, 3nm, 2nm and beyond) + Work with IC design , system design , package SI/PI & thermal...+ Interface with tier #1 external customers for custom ASIC programs or as needed for development support, quality… more
    Broadcom (12/19/24)
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  • Digital Integrated Circuit Design

    The Boeing Company (Huntington Beach, CA)
    …hardware in support of these projects. We are seeking a **Digital Integrated Circuit Design Engineer (Mid-Level, Senior or Lead)** with experience developing ... industry standard Electronic Design Automation (EDA) tools and methodologies for digital ASIC /FPGA/SoC design and verification - eg Synopsys VCS, Design more
    The Boeing Company (12/12/24)
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  • Senior FPGA Design Engineer

    Silvus Technologies (Los Angeles, CA)
    …of your career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA Engineering_ on the _FPGA ... and development process from concept to field deployment. FPGA Design Engineers are responsible for the efficient implementation of...skill. + Experience with communication systems on FPGA or ASIC designs. **COMPENSATION** _The pay range is NOT a… more
    Silvus Technologies (11/14/24)
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  • GPS Senior Specialist, Electrical…

    L3Harris (Anaheim, CA)
    Job Title: Senior Specialist, Electrical Engineer Job Code: 19588 Job Location: Anaheim, CA (Vermont Ave. IEC) Job Schedule: 4/10 Work Schedule Job Description: ... As a Sr . Specialist Electrical Engineer , the candidate must...and flow down applicable requirements to other groups (software, ASIC , & test) so that they can contribute to… more
    L3Harris (12/25/24)
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  • COPD (Customer Owned Physical Design

    Broadcom (Irvine, CA)
    …that keep the globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing some of the ... Technical Lead for Physical Designs Are you a versatile, senior engineer capable of leading external and... design verification and sign-off. 6. Knowledge of ASIC design flow including physical design more
    Broadcom (12/13/24)
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  • Senior Characterization Engineer

    Teradyne (Agoura Hills, CA)
    …reports on the results/findings. The role will involve direct communication with Teradyne's ASIC design team, ATE test team and our internal customers. + ... Overview Teradyne's Silicon Technology Engineering group (STE) needs a senior to expert level bench characterization engineer ...this to create detailed bench level test plans. + Design hardware to interface the DUT to bench equipment.… more
    Teradyne (11/08/24)
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  • Senior Security Firmware Engineer

    Western Digital (Irvine, CA)
    …the Firmware on SoC platforms, as well as bringing up of FPGA and ASIC . + Contribute to the Security Development Lifecycle of the Firmware by supporting its ... development at different stages, including design , threat analysis, implementation, validation, vulnerability testing, certification, and audit. **Qualifications**… more
    Western Digital (11/16/24)
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