• Senior DFT Technical

    Cisco (San Jose, CA)
    …With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design-for-Test. ... more
    Cisco (01/15/25)
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  • Senior ASIC Technical Lead

    Cisco (San Jose, CA)
    …on performing project tasks and problem solving. * Collaborate with the verification, PD, DFT , Package and SW teams to develop next generation AI Switching ASIC. * ... more
    Cisco (12/18/24)
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  • Senior Custom ASIC Engineering Lead

    Broadcom (San Jose, CA)
    …already have a Candidate Account, please Sign-In before you apply.** **Job Description:** ** Senior Custom ASIC Engineering Lead ** Are you a versatile, senior ... more
    Broadcom (02/08/25)
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  • Senior Circuit Design Engineer

    NVIDIA (Santa Clara, CA)
    …of the various communication link designs used in next generation GPUs. + Be a mentor/ technical lead for junior team members. What we need to see: + BSEE ... more
    NVIDIA (01/14/25)
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  • Senior Mixed-Signal Design Verification…

    Google (Mountain View, CA)
    …and deliverables. + Work closely with system, software, design, Design for testing ( DFT ) and physical implementation stakeholders to make technical decisions. + ... more
    Google (01/15/25)
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  • Server High Performance Compute Subsystem…

    Qualcomm (Santa Clara, CA)
    …needs of the server product. **Position: Server High Performance Compute Microarchitecture Lead ** We are seeking experienced CPU Subsystem Leads to join our team. ... more
    Qualcomm (12/05/24)
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  • Corporate Vice President-ASIC Development

    Western Digital (Milpitas, CA)
    …volume to serve a broad spectrum of Flash market. The ideal candidate will lead a global team of 500+ engineers ensuring the efficient, timely, and high-quality ... more
    Western Digital (01/30/25)
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  • Manager, Digital Design - Mixed-Signal High-Speed…

    NVIDIA (Santa Clara, CA)
    …of digital designs using direct and random testing methodologies + Lead front-end design flows (Lint/CDC/Synthesis/ DFT /LEC/STA) and coordinate with back-end ... more
    NVIDIA (12/11/24)
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