• SoC Infrastructure IP

    Qualcomm (Austin, TX)
    …definition or Hands-on RAS design/verification is a plus + Strong knowledge in SOC infrastructure IP (NOC, Caches, SMMU, Memory Controller, Interrupt ... group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System...localize failure in the field + Strong knowledge in SOC and Infrastructure IP (NOC,… more
    Qualcomm (11/21/24)
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  • Principal Memory Controller Architect

    Microsoft Corporation (Austin, TX)
    …and validation teams, to productize new features. + Work with vendors to evaluate intellectual property ( IP ) and make recommendations for integration. + ... with various teams, including product and platform architecture, peer System on Chip ( SoC ) architects, IP...systems . We are committed to delivering advanced, custom SoC designs capable of performing complex and high-performance functions… more
    Microsoft Corporation (12/18/24)
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  • Design Verification Engineer II

    Microsoft Corporation (Austin, TX)
    …experience or internship experience. + 3+ years of pre-silicon System on Chip ( SOC ), chip level, subsystem or IP verification experience. + 3+ years of ... and checkers, and assertions to verify design correctness. + Develop Verification Intellectual Property (VIP) components to verify home grown designs. +… more
    Microsoft Corporation (12/14/24)
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  • Senior Power & Performance Engineer

    Microsoft Corporation (Austin, TX)
    …the stack. + Develop power and performance modeling methodology by creating and owning System on Chip ( SOC ) architectural power models. + Project and report ... team to incorporate low power design methodologies and power saving techniques. Identify IP / SOC power saving opportunities and drive definition of power saving… more
    Microsoft Corporation (12/07/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification 2. Develop...Formal, Emulation 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs 19. Experience with IP more
    Meta (12/27/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable block/ IP /sub- system / SoC level verification 2. Develop...or SVN 16. Experience with verification of ARM/RISC-V based sub- systems or SoCs 17. Experience with IP more
    Meta (11/20/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...or SVN. 18. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 19. Experience with IP more
    Meta (11/09/24)
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  • ASIC Engineer, Design Verification

    Meta (Austin, TX)
    … organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip ( SoC ) for data center applications.As a ... verification plans, build verification test benches to enable IP /sub- system / SoC level verification. 2. Develop...Networking designs. 17. Experience with verification of ARM/RISC-V based sub- systems or SoCs. 18. Experience with IP more
    Meta (11/05/24)
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  • ASIC Engineer, Power

    Meta (Austin, TX)
    …Frequency Scaling(DVFS), AVS 16. Experience architecting systems for various design scales ( IP blocks, SOC , multi-chip system ) with an understanding of ... Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level. We are...around EDA tools, and low-power design to build efficient System on Chip ( SoC ) and IP more
    Meta (10/12/24)
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  • ASIC Engineer, DFT

    Meta (Austin, TX)
    …methodologies, implementation, and verification to build best-in-class System on a Chip ( SOC ) and IP for data center applications. We are looking for ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test (DFT)...in Design for Testability (DFT) methodologies and implementation for IP / SOC , with a deep understanding of Siemens/Synopsys… more
    Meta (10/18/24)
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  • ASIC Engineer, Physical Design

    Meta (Austin, TX)
    …implementation from Netlist to GDSII in low power and high-performance designs to build efficient System on Chip ( SoC ) and IP for data center applications. ... Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience...drive execution. 3. Deliver physical design of an end-to-end IP or integration of ASIC/ SoC design and… more
    Meta (10/22/24)
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  • ASIC Engineer, Emulation

    Meta (Austin, TX)
    …emulation. 15. Experience in architecting emulation systems for various design scales ( IP blocks, SOC , multi-chip system ) with an understanding of ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We are looking for individuals with experience...experience in HW emulation and prototyping required to build System on Chip ( SoC ) and IP more
    Meta (10/17/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    …skills to implement the testing infrastructure to validate new core IP or SoC implementations. You will work closely with researchers, architects ... SystemVerilog, C/C++ based verification and UVM methodology. 9. 3+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog… more
    Meta (11/13/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    …SystemVerilog/UVM methodology and/or C/C++ based verification. 11. 10+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... vendor netlists. 4. Implement scalable power aware simulation and gate level simulation infrastructure leveraging test benches in System Verilog. 5. Keep track… more
    Meta (10/18/24)
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  • Design Verification Engineer

    Meta (Austin, TX)
    …SystemVerilog, C/C++ based verification and UVM methodology. 10. 5+ years experience in IP /sub- system and/or SoC level verification based on SystemVerilog ... and use your digital design and verifications skills to implement the testing infrastructure to validate new core IP implementations and contribute to… more
    Meta (10/17/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (12/11/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build cutting edge machine learning ASICs, capable of world class… more
    Meta (10/12/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS. 4. Soft and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test… more
    Meta (12/06/24)
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  • ASIC Engineer, Design

    Meta (Austin, TX)
    …one or more of the key areas required to build successful world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer, Design ... using Verilog, System Verilog and HLS 4. Soft and hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in… more
    Meta (10/04/24)
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  • Silicon Validation Engineer

    Meta (Austin, TX)
    …delivery. **Required Skills:** Silicon Validation Engineer Responsibilities: 1. Responsible for SoC and E2E system validation plan development, execution and ... report activities. 6. Work with cross-functional teams (ie, architecture, IP , FW, EE, SoC , and product engineer...and product engineer teams) to generate validation reports for SoC and systems . 7. Able to work… more
    Meta (10/18/24)
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