- Qualcomm (Santa Clara, CA)
- …**Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a CPU Emulation Engineer , you will work as part of CPU ... and develop test bench infrastructure in C/C++ and Systemverilog for enabling CPU emulation across different platforms. + Develop verification methodology,… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a " CPU Silicon Bring up and Validation Engineer " you would be part of ... CPU bring up and validation test plans. + Prepare for CPU bring up through pre-work on emulation and FPGA platforms. + Work with SOC bring up teams, software… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team...be able to use other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team...be able to use other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part of a ... Along with traditional simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also provides ample opportunities… more
- Meta (Sunnyvale, CA)
- …Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Lifecycle Responsibilities: 1. Work across all aspects of… more
- Qualcomm (Santa Clara, CA)
- …development process from specification, RTL implementation, verification, synthesis, timing closure, emulation and post silicon bring up. The candidate is also ... debug is preferred + Experience in PCIE/USB peripherals is preferred + Experience in CPU sub system-based design is preferred + Experience in low power design from… more
- Meta (Sunnyvale, CA)
- …Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part of a ... involves partnering with Full Stack Software, Hardware, ASIC Design, Verification, Emulation , Pre/Post-Silicon Validation & Systems teams to deliver reliable and… more
- Meta (Sunnyvale, CA)
- …optimizations 19. Experience with prototyping or pre-silicon environments (FPGAs, simulation, or emulation ) 20. Experience with embedded DSP, CPU , and GPU ... shipping products at the intersection of hardware, software and content.As an Embedded Software Engineer on the Reality Labs team at Meta, you can help build new,… more
- Meta (Sunnyvale, CA)
- …Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part of a dynamic ... solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Enablement (Pre/Post Silicon Validation) Responsibilities: 1. Work… more
- Meta (Menlo Park, CA)
- …the new product introduction (NPI) phase. **Required Skills:** Hardware Systems Engineer , AI NPI Responsibilities: 1. Drive and execute end-to-end system validation ... one or more of the following modules/domains: PCIe, NVlink, Networking, Flash, Memory, CPU , GPU, TPU, DRAM (DDR4/5 or HBM), AI silicon/AI accelerators 15. 3+ years… more
- Meta (Menlo Park, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture development. 3. ... and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and debug. 5. Collaboration with… more
- Siemens (Fremont, CA)
- …expect competent leadership from our managers and executives. This Applications Engineer (AE) position delivers technical expertise for Functional Verification of ... + Deep knowledge of semiconductor IC industry - ASIC, SoC, Memory, Interconnect, CPU architectures, embedded systems + Ability to work in a fast paced, results… more
- Meta (Sunnyvale, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3. ... hard IP identification, selection and integration 6. Collaboration with verification and emulation teams in test plan development and debug 7. Collaboration with… more
- Meta (Sunnyvale, CA)
- …and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3. ... hard IP identification, selection and integration 5. Collaboration with verification and emulation teams in test plan development and debug 6. Collaboration with… more
- Amazon (Cupertino, CA)
- …for use by AWS internal teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional models, infrastructure, and tooling for ... testing, and debug - Work closely with architecture, RTL design, design verification, emulation , and software teams to build, debug, and deploy your models -… more
- quadric.io, Inc (Burlingame, CA)
- …systems Vivado or equivalent toolchain + Experience with implementing flows to map CPU /GPU RTL on FPGA based platforms for emulation purposes Responsibilities + ... Develop flows to run HW verification tests, SDK tests and NNs on these platforms + Build regression environments to ensure flow evolves with HW and SW changes + Triage failures and do first order debug before handing issue to HW or SW team + Keep broader team… more