- Palo Alto Networks (Santa Clara, CA)
- …area, timing, power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize floorplan + Analyze and reduce ... preferred or equivalent military experience required + Minimum 8 years experience in ASIC design + Demonstrated success in taking multiple ASIC products from… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... PPA for high-performance designs, eg Nvidia's CPUs and GPUs. + Explore design space, create optimum floorplan , drive synthesis, physical implementation, and… more
- Google (Mountain View, CA)
- …for design improvements. + Participate in establishing physical design methodologies, flow automation, chip floorplan , power/clock distribution, chip ... tools. Minimum Qualifications: + At least 10 years experience in ASIC physical design flows and methodologies in advanced nodes. + Experience from PD for… more