- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Emulation Power Engineer ! NVIDIA prides in having energy efficient products. We believe that continuing to maintain our ... power consumption of NVIDIA GPUs. As a member of the Emulation Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers,… more
- Cisco (San Jose, CA)
- …our customers build multitenant clouds. What you'll do: * Develop state-of-the-art emulation environments that will be used to evaluate the performance and ... functionality of multi-terabit systems. * Developing emulation infrastructure using C/C++ and TCL * As a...a team member, work closely with the design, DV, power , and post-silicon diagnostic teams. * Assist with test… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are ... latest emulation techniques (C/C++ DPI Transactors, SV assertions, Coverage, Power Estimation, SpeedBridges, Accelerated UVM Testbenches). + Bring up SOCs on … more
- Tarana Wireless (Milpitas, CA)
- This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture and ... Development, assessment and refinement of RTL design to target power , performance, area and timing goals + Write design...Ensure robust design and complete coverage + Work with Emulation teams to test the design on various … more
- Qualcomm (Santa Clara, CA)
- …team you will be working on WiFi (802.11x) technology, SOC Design, Low Power micro-architecture, Power Intent/Implementation, power estimates and power ... specifications from Architectural and systems requirements and deliver detailed low power micro-architecture and design. Also work closely with verification team to… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to ... need to see: + BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus. + 5+ years… more
- Amazon (Cupertino, CA)
- …custom-designed accelerator SoCs for use by AWS internal teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional ... testing, and debug - Work closely with architecture, RTL design, design verification, emulation , and software teams to build, debug, and deploy your models -… more
- Google (Mountain View, CA)
- …+ Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low- power design techniques. + Experience with scripting ... methodologies for clock domain checks, reset checks and low power design. + Domain knowledge in one of these...Debug/Trace, Interrupts, or Clocks/Reset. + Knowledge of FPGA and emulation platforms. + Knowledge of high performance and energy… more
- Cisco (San Jose, CA)
- …in reviews. * Implement Verilog RTL to meet timing, performance, and power requirements. * Contribute to full chip integration and timing methodology/analysis. * ... programming) * Experience with formal verification tools * Experience with emulation #WeAreCisco #WeAreCisco where every individual brings their unique skills and… more
- Power Integrations (San Jose, CA)
- …to our customers. In the process of specifying new integrated circuits, the Senior Systems Engineer will use advanced simulation techniques to develop algorithms ... The role of the Principal Product Definition Engineer is to analyze customer requirements, create full...bench. + Development of compelling IC-based solutions for switch-mode power supplies (SMPS) off-line and Automotive applications by analysis… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon ... and optimal performance. * Support testing of design in emulation . * Oversee and manage the ASIC bring-up process....work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …work full time in the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position Requirements This team is ... protocol is a plus. + Understanding of digital architecture trade-offs for power , performance, and area + Understanding of proper handling of multiple asynchronous… more