• ASIC Rtl Design

    Broadcom (San Jose, CA)
    …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
    Broadcom (11/01/24)
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  • ASIC Rtl Engineer Intern,…

    Amazon (Cupertino, CA)
    …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...the future with us! Responsibilities: * Participate in logic design activities as part of Amazon's machine learning custom… more
    Amazon (11/16/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... / flow experience + Fundamental digital design concepts and experience in ASIC design flow including RTL design , verification, logic synthesis and… more
    NVIDIA (12/11/24)
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  • TPU Compute RTL Design

    Google (Sunnyvale, CA)
    …delivering unparalleled performance, efficiency, and integration. As a Tensor Processing Unit (TPU) Compute RTL Design Engineer you will be part of a team ... subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products...(DV) teams to create testplans to verify and debug design RTL . + Work with physical … more
    Google (12/27/24)
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  • ASIC Design Engineer

    Amazon (Cupertino, CA)
    …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years… more
    Amazon (12/19/24)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog...design of digital circuits using Verilog + Frontend design development and integration of large ASIC more
    Tarana Wireless (11/02/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
    NVIDIA (12/11/24)
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  • ASIC Design Verification…

    Cisco (San Jose, CA)
    …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... and review of code and functional coverage. * Ensure RTL quality with qualifying the design with...design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware… more
    Cisco (10/01/24)
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  • ASIC Digital Design Engineer

    Qualcomm (San Jose, CA)
    …a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design , optimize, verify, validate, implement, and document ... Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related...power use, and verification or similarly for custom circuit design /layout flow. * Utilizes tools/applications (eg, RTL more
    Qualcomm (12/23/24)
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  • Sr. SOC/ ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (11/15/24)
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  • ASIC Engineer , Physical…

    Meta (Sunnyvale, CA)
    …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our...to improve performance and power. 5. Work with the RTL design team to understand partition architecture… more
    Meta (10/22/24)
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  • ASIC Design Engineer

    Amazon (Cupertino, CA)
    design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...area and power-efficient RTL designs to meet project specifications and targets *… more
    Amazon (12/23/24)
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  • Sr. ASIC Design Verification…

    Qualcomm (Santa Clara, CA)
    …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and...and methodology + 5+ years of experience with digital design concepts and RTL languages such as… more
    Qualcomm (10/14/24)
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  • ASIC Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to improve RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and… more
    Google (12/10/24)
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  • ASIC Engineer , Design

    Meta (Sunnyvale, CA)
    …world-class complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure...Micro-architecture development 3. RTL development using Verilog, System Verilog and HLS 4.… more
    Meta (12/11/24)
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  • Senior ASIC Integration and CAD…

    Palo Alto Networks (Santa Clara, CA)
    …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer , you will...RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC more
    Palo Alto Networks (12/21/24)
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  • ASIC Engineer Intern, Design

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon ... engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer Intern, Design Responsibilities:...Design , and Verification reviews and provide feedback 2. Design and develop RTL or HLS code… more
    Meta (11/02/24)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... or Master's degree in Electrical or Computer engineering. * 8+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
    Cisco (11/15/24)
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  • ASIC Design Engineer

    Cisco (San Jose, CA)
    …the lab. Who You'll Work With You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... * Bachelor's degree in Electrical or Computer engineering. * 4+ years of ASIC Design experience. * Excellent Verilog/System Verilog programming skills. *… more
    Cisco (11/08/24)
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  • ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... the opportunity to be responsible for the micro-architecture and design including RTL design , synthesis,...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT,… more
    NVIDIA (12/21/24)
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