• Lead , FPGA Uvm Design

    L3Harris (Salt Lake City, UT)
    …the space, air, land, sea and cyber domains in the interest of national security. Job Title: Lead , FPGA UVM Design Engineer Job Location: Salt Lake City, ... 21254 Work Schedule: 9x80 Job Description: We are looking for a talented FPGA design engineer with industry experience in Universal Verification Methodology (… more
    L3Harris (02/20/25)
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  • Principal Engineer Digital

    Northrop Grumman (Roy, UT)
    …to meet its business need + Experience in any of the full product life cycles of: ASIC Design , FPGA Design , or RTL Design + Experience in back end ASIC ... Security Hardware Assurance Engineer, Level 3. You will be responsible for helping lead a team of engineers focused on simulation & verification of physical system… more
    Northrop Grumman (02/14/25)
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