We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...expertise to identify and implement improvements in the current design flow and methodologies to improve efficiency … more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology + 5+ years of… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... Systems design . + A deep understanding of ASIC design flow including RTL design...virtual channels. + Interest or have prior experience in efficiency enhancement, such as, flow development and code generator.… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... and emulation strategies) to continuously push the quality and efficiency of test benches + Successful candidate will be...Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design ...and propose and implement new ways to improve the efficiency in the GPU/CPU clocking design . What… more
- Palo Alto Networks (Santa Clara, CA)
- …You will collaborate closely with the ASIC vendor and the PANW ASIC design team in floorplanning, closing timing, validating constraints, and optimizing ... we all win with precision. **Your Career** As an ASIC Integration and CAD Engineer , you will...RAMs, CAMs, custom IPs, and IO pads throughout the design hierarchy + Collaborate with external ASIC … more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or ... techniques to improve RTL code, performance and power as well as low-power design techniques. + Experience with ARM-based SoCs, interconnects and ASIC … more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- Broadcom (San Jose, CA)
- …Ethernet solutions that deliver unprecedented performance at critically important power efficiency ._** **_We are looking for highly skilled and efficient Constrained ... Random Design Verification engineers that want to verify new designs...of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products.… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior Verification Engineer to join our Display Team! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... creativity and intelligence! In this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own all tasks involved in… more
- Qualcomm (Santa Clara, CA)
- …Summary:** As a Design Verification Lead, you will lead a team of ASIC design verification engineers to verify IP and Subsystems that be integrated in ... and emulation strategies) to continuously push the quality and efficiency of test benches + Act as a technical...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Cisco (San Jose, CA)
- …some of the most complex ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation of complex multi-hierarchy ... the creation of custom macros, contributing to our team's efficiency and success. Responsibilities include: * Develop and own...design of an end-to-end IP or integration of ASIC /SoC design . * Design custom… more
- Meta (Sunnyvale, CA)
- …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...Qualifications: 6. 5+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
- Google (Sunnyvale, CA)
- …also be involved in defining and creating methodologies that enable a highly efficient design environment for all ASIC engineers. Behind everything our users see ... emphasis on computer architecture, or a related field. + Experience with low-power design techniques such as clock gating, power gating, and DVFS. + Experience with… more
- Google (Mountain View, CA)
- …or Computer Science, with an emphasis on computer architecture. + Experience with ASIC design methodologies for clock domain checks, reset checks and low ... power design . + Experience in ASIC ...the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. Google's mission is to organize the… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking an experienced package design engineer for complex flip-chip-BGA packages for industry-leading ASICs ... to create the package structures needed to enable new design , and contribute to efficiency improvements for...for our design team. **RESPONSIBILITIES:** . Overall design responsibility for ASIC package designs, including… more
- Google (Sunnyvale, CA)
- … efficiency , and integration. As a Tensor Processing Unit (TPU) Compute RTL Design Engineer you will be part of a team developing Application-specific ... of silicon-based ICs and chips. + 3 years of experience with digital design experience using SystemVerilog RTL. Preferred qualifications: + Master's degree or PhD in… more
- Google (Sunnyvale, CA)
- …on computer architecture. + 2 years of experience with C++/Python software design principles. + Experience bringing up high-power ASICs. + Experience with reading ... hardware description languages (SystemVerilog) and chip design flow, and building test automation tools and scripts. + Enthusiasm for unusual computer architectures.… more