We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA

  • ASIC Engineer , Emulation

    Meta (Sunnyvale, CA)
    …/System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Deliver high-quality ... **Summary:** Engineers with experience in HW emulation and prototyping required to build ASIC...**Preferred Qualifications:** Preferred Qualifications: 11. Track record of successful ASIC /SoC where emulation is a critical workflow… more
    Meta (12/20/25)
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  • ASIC Engineer , SoC Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , SoC Verification Responsibilities: 1. Define and implement ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
    Meta (12/20/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
    Meta (12/20/25)
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  • ASIC Engineer , Performance…

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Performance & Package Verification Responsibilities: 1. ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...simulation, you will use other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
    Meta (12/20/25)
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  • ASIC Engineer , Design Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...you will be using other approaches like Formal and Emulation to achieve a bug-free design. The role also… more
    Meta (12/20/25)
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  • Principal ASIC Design Verification…

    Palo Alto Networks (Santa Clara, CA)
    …and the kind of precision that drives great outcomes. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our ... and debug. You will work on diverse platforms including simulation, emulation , formal verification, and silicon validation. We expect office-based employees to… more
    Palo Alto Networks (12/10/25)
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  • Design Engineer , Emulation

    Cadence Design Systems, Inc. (San Jose, CA)
    …Part of the team that takes state-of-the-art Cadence Palladium system chips from emulation /bringup to production + Working on chip design verification, emulation ... in MS/BS in Electrical Engineering, Computer Engineering, or a similar major. * Experience with ASIC / RTL / HW Development * Interest and knowledge of verif / post… more
    Cadence Design Systems, Inc. (01/08/26)
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  • ASIC Engineer , Formal Verification

    Meta (Sunnyvale, CA)
    …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal… more
    Meta (12/20/25)
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  • ASIC Engineer Intern, Implementation

    Meta (Sunnyvale, CA)
    **Summary:** Meta is seeking an ASIC Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon which our ... are twelve (12) to sixteen (16) weeks long. **Required Skills:** ASIC Engineer Intern, Implementation Responsibilities: 1. Participate in Design… more
    Meta (01/09/26)
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  • Senior ASIC Design Engineer (NetSec)

    Palo Alto Networks (Santa Clara, CA)
    …and the kind of precision that drives great outcomes. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall ... performance, and power targets. + **Verify** your blocks with simulation, emulation , formal methods, and silicon bring-up. + **Collaborate** with verification… more
    Palo Alto Networks (12/15/25)
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  • Senior ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    …Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior ASIC Design Engineer , you will be part of an advanced design and architecture team ... modules, defining clock domains and power domains - Knowledge of FPGA and emulation platforms - Knowledge of SoC architecture - Excellent verbal and written… more
    Amazon (12/12/25)
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  • Senior Systems Prototyping Engineer

    NVIDIA (Santa Clara, CA)
    …on standard FPGA prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa Clara, CA. What ... Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you...as USB4/3 is desirable + Prior experience with hardware emulation or prototyping (Synopsys HAPS, Zebu, Mentor Veloce) of… more
    NVIDIA (12/17/25)
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  • Verification Engineer

    Broadcom (San Jose, CA)
    …Description:** You will be joining Broadcom's custom silicon division, working on IPs for ASIC products such as custom AI chips. This position is responsible for IP ... in CDC check, formal verification, functional coverage, gate level debug and emulation tools * Very strong debugging and problem-solving skills, proven track record… more
    Broadcom (10/30/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …through architecture, firmware, and algorithms. **Required Skills:** Design Verification Engineer Responsibilities: 1. Define and implement verification plans, and ... and code coverage 4. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality… more
    Meta (12/20/25)
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  • Software Engineer I

    Cadence Design Systems, Inc. (San Jose, CA)
    …on the world of technology. Cadence is the leader in hardware emulation -prototyping technology and products. System engineering team is responsible to define, ... We are now looking for a hands-on system integration engineer who wants to expand his/her scope, work with...and gate-keep the full integration, validation, and characterization of ASIC , HW/PCB, SW, FW, and FPGA subsystems in the… more
    Cadence Design Systems, Inc. (01/07/26)
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  • Senior Architecture Energy Modeling…

    NVIDIA (Santa Clara, CA)
    We are now looking for an Sr. Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient products. We believe that continuing to ... energy models that integrate into architectural simulators, RTL simulation, emulation and silicon platforms. Key responsibilities include developing Machine Learning… more
    NVIDIA (12/05/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a industry-leading group of researchers and engineers, and use your digital design ... drive our industry leading wearable systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
    Meta (12/20/25)
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  • Staff Logic Design Engineer

    Teledyne (Milpitas, CA)
    …networking. **Role Overview** We are looking for a top-notch Staff Logic Design engineer who has the right composition of knowledge, experience, team play, spirit ... products. Join our high-speed Protocol Team as a **Staff** **Logic Design Engineer ** , where you'll architect and implement high-performance digital logic for… more
    Teledyne (11/18/25)
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  • Senior FPGA Design Engineer

    Tarana Wireless (Milpitas, CA)
    …development and testing of advanced FPGAs powering our next-gen wireless base stations and ASIC emulation platforms. You'll play a vital role in building the ... foundation of tomorrow's wireless infrastructure. What You'll Do: + Design, implement, and debug logic for large FPGAs + Simulate, test, and validate logic at both module and system levels + Participate in system-level integration and troubleshooting +… more
    Tarana Wireless (11/11/25)
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