We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- As a Senior Formal Verification Engineer at NVIDIA, you will verify the design and implementation of the industry's leading GPUs. In this position, your ... responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure design correctness. You… more
- Microsoft Corporation (Mountain View, CA)
- …Azure AI SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge IP ... where everyone can thrive at work and beyond. We are looking for a ** Senior Design Verification Engineer ** to join the team. **Responsibilities** As… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... in industry-standard verification flows like SV constraint random verification , UVM, Formal Verification , Coverage metrics, profiling tools, X prop, etc.… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + Experience in different verification techniques and methodologies including formal , Gate-Level Simulation, Unified ... field, or equivalent practical experience. + 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog. + Experience… more
- Google (Mountain View, CA)
- …power (eg, Unified Power Format or Common Power Format), gate level (GLS) and formal verification techniques. + Experience working with mixed signal (eg, Analog ... equivalent practical experience. + 5 years of experience leading digital verification using SystemVerilog for ASIC designs. + Experience developing and maintaining… more
- Cisco (San Jose, CA)
- …and Python/Perl are preferred. * Knowledge of Networking is preferred. * Experience with Formal verification is a plus. Why Cisco? #WeAreCisco. We are all ... design, and post-silicon validation The team comprises micro-architects, front-end designers, and verification engineers. Cisco is a system company, so you can also… more
- Cisco (San Jose, CA)
- …Who You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of ... * Experience with Forwarding logic/Parsers/P4. * Experience with Veloce/Palladium/Zebu/HAPS. * Formal verification (iev/vc formal ) knowledge. * Domain… more
- Motion Recruitment Partners (Palo Alto, CA)
- … verification . + Good knowledge of timing analysis, power analysis, physical verification (DRC/LVS), and formal verification + Working knowledge of ... Senior Hardware Engineer Palo Alto, CA... Senior Hardware Engineer Palo Alto, CA **Onsite** Contract $70/hr -...UPF specification in Power Intent design, implementation, and verification of power gating, level shifter, and isolation. +… more
- NVIDIA (Santa Clara, CA)
- …based SOCs + Prior hands-on experience in Ada/SPARK programming (including specification and formal verification ) and TLA+ formal verification modeling ... We have an exciting opportunity for a talented Senior System Software Engineer to join...strong C and/or Ada/SPARK programming skills, and experience with formal methods, we want to hear from you! Join… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...or Perl or Python + Experience in Synthesis and Formal is a plus + Excellent verbal and written… more
- NVIDIA (Santa Clara, CA)
- …of Automotive quality standards, ASPICE, ISO 26262, ISO 21434 + Hands-on experience with formal verification methods and tools, such as Ada/SPARK and TLA+ + ... world-class Autonomous Vehicles. We are making extensive use of formal methods to automate our workflow and increase the...SW. We are hiring now for the position of Senior System Software Engineer for Hypervisor and… more
- Broadcom (San Jose, CA)
- …to help through congestion resolution and timing closure. Should have experience of formal verification and timing analysis and Eco implementation. Should be ... manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate...implementation of blocks and top-level including clock-tree. . Physical verification and timing closure for block and chip-level. .… more
- NVIDIA (Santa Clara, CA)
- …CDR, and offset cancellation + Experience with static timing tools (nanotime, primetime) and formal verification tools + Have a strong background in Perl and ... We are now hiring for a Senior Logic and Digital Circuit Design Engineer...in RTL for mixed-signal blocks; Experience with industry standard verification methodologies, such as UVM + Proven experience with… more
- NVIDIA (Santa Clara, CA)
- …modern C++, build systems, and database. + Experienced with EDA Vendor tools for design, verification and formal analysis. The base salary range is 148,000 USD - ... infrastructure tools used by design engineers for build and verification of architectural, rtl, and gate level designs. As...architectural, rtl, and gate level designs. As a software engineer , you will craft highly efficient software to automate… more
- Siemens Digital Industries Software (Fremont, CA)
- …algorithms and job distribution techniques. + Exposure to Simulation or Formal -based Verification methodologies. **Education** A Bachelor's or Master's degree ... We are seeking a passionate and highly skilled software engineer to join the QuestaSim (Simulation) R&D team at...+ Solve complex software problems in collaboration with a senior group of engineers in a fast-paced and dynamic… more
- NVIDIA (Santa Clara, CA)
- …a lasting impact on the world. We are looking for a motivated CAD Methodology Engineer to join our dynamic and growing team. If you like solving challenging problems ... in asynchronous digital design and verification in a highly multi-functional work environment then join...Deep understanding of static sign-off technologies CDC, RDC and Formal . + Proficiency in one or more scripting languages… more
- Google (Mountain View, CA)
- …design, physical design flows and methodologies including synthesis, place and route, STA, Formal Verification , CDC and Power Analysis using tools such as Design ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...We are seeking a talented and highly motivated hardware engineer to join our GenAI technical infrastructure research hardware… more
- Siemens Digital Industries Software (Fremont, CA)
- …stacks like AWS, Azure, Google cloud etc. + Exposure to Simulation or Formal -based Verification methodologies. + Knowledge of Python, ML based techniques and ... chip, board, and system design. We are seeking a passionate and highly skilled software engineer to join the Questa Visualizer Debug R&D team at Siemens EDA. In this… more
- Cisco (San Jose, CA)
- …* Scripting experience (Python, Perl, TCL, shell programming) * Experience with formal verification tools * Experience with emulation #WeAreCisco #WeAreCisco ... * Help define, evolve, and support our design methodology. * Collaborate with the verification team to address design bugs and close code coverage. * Work closely… more
- Cisco (San Jose, CA)
- …related work experience. *Experience using: Synopsys PTPX/Tweaker/PrimeClosure *Experience using Formal Verification : Synopsys Formality and Cadence LEC. ... *Experience using Parasitic Extraction: Synopsys Star-RCXT, Cadence Quantus. \#WeAreCisco \#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all. Our passion is… more