- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...equivalent practical experience. 9. 5+ years of experience in static verification tools 10. Experience with Lint, Clock Domain… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...analysis , SI noise analysis 13. Experience with running Static Timing Analysis for full chip using DMSA 14.… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... timing convergence, timing constraints generation and management, and ECO generation and implementation . What we need to see: + BS (or equivalent experience) in… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve timing convergence flows working… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …fundamentals and Static Timing Analysis is required + Prior experience with ASIC digital implementation flows and EDA tools is required; Experience with ... in the field of artificial intelligence and machine learning. Lead Application Engineer is responsible for providing pre-sales and post-sales technical support for… more
- Cisco (San Jose, CA)
- …Engineering or Computer Science, with 5+ year minimum of hands-on experience in ASIC implementation and Physical verification. * Hands-on experience in physical ... ASICs being developed. Your Impact As a physical design engineer you will be spearheading the implementation ...Science, with 3+ year minimum of hands-on experience in ASIC implementation and Physical verification. * Experience… more
- Broadcom (San Jose, CA)
- …the physical design team to aid in overall closure and manufacture of the ASIC with emphasis on low power, optimized area, max. performance and high overall ... candidate should have a strong understanding of VLSI and ASIC physical design 12+ years of experience w/ a...of PLLs and clock networks Significant experience using a static timing analysis tool. Preferably Synopsys PrimeTime and/or Cadence… more
- Meta (Sunnyvale, CA)
- **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design ... virtual and augmented reality systems. **Required Skills:** Digital Design Engineer Responsibilities: 1. Responsible for top-level or block level uArchitecture… more
- Broadcom (San Jose, CA)
- …Broadcom Inc. has brought some of the most complex and cutting edge networking ASIC 's and multi-chip solutions to market over the last decade. These products support ... as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the 3nm high speed physical… more
- Teledyne (Mountain View, CA)
- …and emerging challenges. Teledyne Microwave Solutions is hiring a Digital Design Engineer that will be responsible for the digital design of integrated circuits ... module interfaces, conducts design reviews, and participates in design implementation . Responsibilities include debugging, verification, and resolving technical issues,… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** Broadcom ASIC product division is a leader in semiconductor innovation, delivering ... As a Staff Digital Front-End Designer, you will own the design and implementation of complex digital IP and subsystems, focusing on RTL coding, micro-architecture,… more