- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... to optimize performance, yield, and reliability through increasingly comprehensive modeling , informative analysis, and automation. This work will influence the… more
- Google (Sunnyvale, CA)
- …experiences, delivering unparalleled performance, efficiency, and integration. As a Signal Integrity/ Power Integrity Engineer , you will lead chip and package ... field, or equivalent practical experience. + Experience with Signal and Power Integrity (SI/PI) fundamental concepts, microwave theory, or analog circuit design.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... creative Signal Integrity solutions to complex system design problems. + Modeling and Optimization of vias, connectors, sockets, breakouts and various system… more
- Google (Sunnyvale, CA)
- …of industry experience in the SI/PI field. + Experience in industry SIPI modeling tool chains (eg, HFSS, ADS, Sigrity, Siwave, etc). Preferred qualifications: + ... bridge, 3D die stacking, STA, Voltage budget). + Expertise in signal and power integrity for various high speed interconnects (eg, HBMx, D2D, Ethernet, PCIe and… more
- Qualcomm (Santa Clara, CA)
- …individuals for our cutting-edge technology work! As a Lead CPU performance projection engineer you will be responsible modeling and projecting the CPU ... * Correlate performance projections vs silicon measurements and refine the projection methodology accordingly * Organize work and document status, results in Jiras *… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... timing closure strategy, creating timing constraints, driving timing and power convergence, as well as ECO implementation + Apply...experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you want to challenge ... closure of high-performance designs with a focus on improving PPA (Performance, Power , Area). + Good understanding of hardware architecture and RTL/logic design for… more
- Palo Alto Networks (Santa Clara, CA)
- …- just to name a few! At Palo Alto Networks, we believe in the power of collaboration and value in-person interactions. This is why our employees generally work full ... of Palo Alto Networks Firewall and SD-WAN hardware including: selecting components; modeling and simulating memory and serdes interfaces; modeling PDN networks;… more
- Qualcomm (Santa Clara, CA)
- …**General Summary:** Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , ... pre- and post-silicon verification to verify correctness and ensure performance and power goals are met. The responsibilities of this role include: + Owning… more
- Electric Power Research Institute (Palo Alto, CA)
- **Job Title:** Advanced Buildings & Communities Student Engineer **Location:** Palo Alto, CA **Job Summary and Description:** This student internship position will ... Strong attention to detail with strong documentation skills of methodology as well as results + Communication skills willing...etc. is a plus + Willingness to learn building modeling software such as Energy Plus, BeOpt, etc. +… more