- Siemens (Fremont, CA)
- …Tessent division seeks a highly motivated, creative, and energetic individual as Product Engineer , specializing in design-for- test (DFT) and test delivery at ... and technology leader of automated tools for insertion of semiconductor design-for- test (DFT) structures, automatic test pattern generation (ATPG), embedded… more
- Meta (Sunnyvale, CA)
- …milestones including TO, from a timing signoff perspective. 4. Develop robust timing signoff automation and test structures to ensure Meta's timing ... methodology development. We are looking for individuals with experience in timing signoff flow/methodology development for large complex disaggregated ASICs, with… more
- Belcan (Palo Alto, CA)
- …expected operation sequences, and their corresponding results, including Register maps, Timing diagrams, Command sequences Develop test vectors based on ... Senior Hardware Engineer Job Number: 353813 Category: Electrical / Electronics...and invalid input scenarios, edge cases for register settings, timing and sequence requirements; enhance the test … more
- SLAC National Accelerator Laboratory (Menlo Park, CA)
- Control System Engineer Job ID 6186 Location SLAC - Menlo Park, CA Full-Time Regular **SLAC Job Postings** **Position overview:** Do you enjoy collaborating with a ... (LCLS) Directorate at SLAC is seeking a Control System Engineer to join the Engineering and Design controls team....of tools and applications for experiment laser control and timing control systems. LCLS is the world?s first hard… more
- SpaceX (Sunnyvale, CA)
- SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring the ... of enabling human life on Mars. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience...internet to millions of users worldwide. We design, build, test , and operate all parts of the system -… more
- Cisco (San Jose, CA)
- …from concept to first customer shipments. Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing ... SDC/STA tools and scripting for automation, you excel at identifying and resolving timing issues across all design levels. You will collaborate with Front-end and… more
- Qualcomm (Santa Clara, CA)
- …positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores using state-of-the-art tools ... responsibilities in this role involves good understanding of functional and test (DFT) mode constraints for place and route, floorplanning, power planning,… more
- Ford Motor Company (Palo Alto, CA)
- …growth through electric and connected vehicles and services. The Prototype Development Engineer will be responsible for the bring-up and maintenance of the labcar. ... The engineer will be supporting activities for the prototype builds...to plan component installation and coordinate with engineers for timing when the labcar and prototype vehicles will be… more
- CDM Smith (San Jose, CA)
- …processes, and tools. CDM Smith is seeking a strategic Senior Professional Engineer with substantial Construction Manager / Resident Engineer (RE) experience ... direction. As a strategic Senior Construction Manager / Resident Engineer (RE) and leader at the firm, you will...and provide strategic insights on construction feasibility, cost, and timing for proposed projects. You will also be required… more
- Meta (Sunnyvale, CA)
- …Join Meta's Wearable Silicon AMS team as a Digital Mixed Signal Design Engineer and work alongside world-class researchers and engineers to develop cutting-edge AMS ... augmented reality systems. **Required Skills:** Digital Mixed Signal Design Engineer Responsibilities: 1. Collaborate with AMS architects to define… more
- Broadcom (San Jose, CA)
- …complex and cutting edge network switching ASIC DFx (Design for Test /debug & manufacturability) from DFT architecture, to implementation, verification, timing ... aggressively deliver low DPPM's, while optimizing the cost for test . Responsibilities + Drive the test quality...plus + Experience or familiarity in back-end chip design, Timing , CDC flows is a plus + Strong Pre/Post… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is looking for an experienced ASIC Packaging Engineer , Signal Integrity, and Power Integrity focus for its ASIC packaging team to support the ... part of a world-class engineering team. **Required Skills:** ASIC Package Engineer SI/PI Responsibilities: 1. Drive chip-package-system co-design by driving signal… more
- TrustPoint (Mountain View, CA)
- …anti-jam capabilities. The improvements will support US Government position and timing service resiliency as well as enable next-generation commercial applications ... with our microsatellite based commercial infrastructure and innovative positioning and timing services. The Position With locations outside Washington DC and in… more
- Broadcom (San Jose, CA)
- …with verification engineers and physical design teams to ensure functional correctness, timing closure, and overall design robustness, with a strong focus on ... specifications, focusing on efficient and robust design implementations. **Synthesis and Timing Closure:** + Perform synthesis and work with physical design teams… more
- CDM Smith (San Jose, CA)
- …wastewater plant design, transit facilities, and industrial facilities. As a Hydraulic Structures Engineer at CDM Smith, you will have the opportunity to grow your ... We offer partial remote working schedules. The Hydraulic Structures Engineer will have the following responsibilities: - Analyze and...employment has been made in the United States. The timing of when background checks will be conducted on… more
- NVIDIA (Santa Clara, CA)
- …a wide range of sectors. We are seeking post-silicon Senior System Level Product Engineer who is passionate and committed to making a difference in the world through ... As a member of this team, you are responsible for developing procedures and test specs for manufacturing line with an innate understanding of product quality and… more
- Micron Technology, Inc. (San Jose, CA)
- …Qualifications:** + Familiarity with EDA tools such as Simulators, System Verilog, Synthesis, Timing Closure, UVM Test Bench, Assertion, and Coverage Closure. + ... solutions and we are looking for a Sr. Design Engineer to join us in San Jose, CA, USA....environment. **Responsibilities** As a Senior Design and Verification Automation Engineer in the Design Automation group, you will: +… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers to design ... micro-architecture and design including RTL design, synthesis, functional verification and timing analysis using groundbreaking CAD tools and using the latest… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... improving the netlist and timing quality of our designs and if you are...automated tools. + Create prototypes of patentable ideas on test chips and drive them to be deployed across… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... algorithms. You'll then implement the RTL in SystemVerilog, define test cases that will deeply verify the design and...define and build constraints for synthesis and drive for timing closure. In addition to RTL design, you'll need… more