- Cisco (San Jose, CA)
- …some of the most complex ASICs being developed in the industry. What You'll Do As ASIC Verification Engineer in The Core Hardware Business Unit, you will be ... or Computer Science or related degree *5+ years of experience in high-performance ASIC verification . *Experience with System Verilog HVL and HDL languages/tools… more
- Cisco (San Jose, CA)
- …You'll Work With: You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely ... with verification engineers, designers, hardware and cross-functional teams to verify the ASIC in simulation, in emulation, and during ASIC bring-up. What… more
- Capgemini (San Francisco, CA)
- **Job Title: ASIC Design Verification Infrastructure Engineer (Modern Python experience is must)** **Job Location: Sunnyvale, CA (Remote work is OK)** **Job ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _ASIC Design Verification Engineer (with modern Python programming)_ **Location:** _CA-San… more
- Cisco (San Jose, CA)
- …experience with System Verilog / UVM programming * 4+ Years post graduate ASIC Verification processes, methodologies, flows and tools * Experience with scripting ... in deployment-mode applications. Your Impact You will participate in the ASIC design verification for Cisco high-end switching Products, one of the largest and… more
- Broadcom (San Jose, CA)
- …Switch Group (CSG) at Broadcom is the industry leading provider of networking ASIC 's. CSG develops the most advanced networking protocols as well as industry leading ... candidate will be responsible for various key tasks in the areas of verification of cutting edge network switch routing designs. The day-to-day tasks for this… more
- Cisco (San Jose, CA)
- …You Are The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ... ASIC design verification experience. * Proficient in ASIC verification using UVM/System Verilog. * Proficient in verifying complex blocks, clusters and… more
- Cisco (San Jose, CA)
- …of related ASIC design verification experience. * Proficient in ASIC verification using UVM/System Verilog. * Proficient in verifying complex blocks ... including constraint random and directed stimulus. * Ensure complete verification coverage through code and functional coverage, as well...CE, or other related field with 5+ years of ASIC design verification experience. * 5+ years… more
- Broadcom (San Jose, CA)
- …**_We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly ... teams to develop leading edge products. All aspects of Design Verification will be involved, along with opportunities for technical leadership._** **_Skills:… more
- Meta (Menlo Park, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Responsibilities: 1. Work across all aspects… more
- Cisco (San Jose, CA)
- … experience with a bachelor's or master's degree * Prior experience with ASIC verification using UVM/System Verilog. * Prior experience in verifying complex ... and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle. Your Impact: You will gain hands-on… more
- Meta (Menlo Park, CA)
- **Summary:** Meta Platforms Inc. is seeking an ASIC Engineer , Architecture to join our Infrastructure organization. This organization is responsible for building ... expert engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Machine Learning Architecture (PhD) Responsibilities: 1.… more
- Cisco (San Jose, CA)
- …What You'll Do The Core Hardware Business Unit is looking for a motivated Senior Verification engineer /lead to engage in new development of our UCS family. You ... Bachelor's or Master's degree in equivalent experience. * Prior experience with ASIC verification using UVM/System Verilog. * Prior experience verifying complex… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:**… more
- Cisco (San Jose, CA)
- …provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography ... breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Write micro-architecture...and support our design methodology. * Collaborate with the verification team to address design bugs and close code… more
- Cisco (San Jose, CA)
- …being developed in the industry. Your Impact You will collaborate with architects, ASIC front-end and Design Verification teams to understand chip architecture, ... * Analyze code coverage and provide feedback to the verification team to achieve coverage closure. * Perform LINT...Computer Science or related degree with 5+ years of ASIC design experience or Masters degree in Electrical Engineering,… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...hard IP identification, selection and integration 6. Collaboration with verification and emulation teams in test plan development and… more
- Cisco (San Jose, CA)
- …service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon ... breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Author design...Develop and analyze functional coverage. * Collaborate with the verification team to address design bugs and close code… more
- Cisco (San Jose, CA)
- …engineers on performing project tasks and problem solving. * Collaborate with the verification , PD, DFT, Package and SW teams to develop next generation AI Switching ... ASIC * Perform diagnostic and post silicon validation tests...in Electrical or Computer engineering and 15+ years of ASIC Design experience. * Experience with Verilog and System… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + Understanding...towards Intelligent Industry. Capgemini Engineering has more than 55,000 engineer and scientist team members in over 30 countries… more
- Meta (Menlo Park, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...and hard IP identification, selection and integration. Collaboration with verification and emulation teams in test plan development and… more