• ASIC DFT Implementation Lead

    Cisco (San Jose, CA)
    …San Jose, CA with a primary focus on Design-for-Test. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and ... DFT logic & IP integration; familiarity with functional verification * DFT CAD development & EDA interactions - Test Architecture, Methodology and Infrastructure… more
    Cisco (11/01/24)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …San Jose, CA with a primary focus on Design-for-Test. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and ... Scripting skills: Tcl, Python/Perl. Preferred Qualifications: * Prior experience with DFT CAD development - Test Architecture, Methodology and Infrastructure *… more
    Cisco (10/19/24)
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  • ASIC Design for Test Technical Leader

    Cisco (San Jose, CA)
    …San Jose, CA with a primary focus on Design-for-Test. You will work with Front - end RTL teams, backend physical design teams to understand chip architecture and ... DFT logic & IP integration; familiarity with functional verification * DFT CAD development - Test Architecture, Methodology and Infrastructure * Background… more
    Cisco (08/16/24)
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