- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- Stanford University (Stanford, CA)
- …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...a live assessment exercise. **CORE DUTIES*:** + Architect and engineer the design , development, implementation and maintenance… more
- Jacobs (San Francisco, CA)
- …up our communities today to improve tomorrow. We're looking for a mid-level Engineer to design geotechnical aspects of environmental remedial actions for complex ... pass your knowledge on to others. As a junior/mid-level Engineer , you'll be directed by Design Managers...field work for remediation projects, and an understanding of methodology and procedures * Experience working on active project… more
- Microsoft Corporation (Mountain View, CA)
- …cutting-edge silicon solutions for Microsoft. We are seeking a **Senior Analog Computer-Aided Design Engineer ** to join our team! **Microsoft's mission is to ... our Central Analog Computer-Aided Desing (CAD) Tools, Flows and Methodology (TFM) group leading physical verification across...with the central CAD organization as well as across design teams to align roadmap for physical … more
- Microsoft Corporation (Mountain View, CA)
- …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Verification Engineer ** to work on leading edge IP (intellectual property) ... constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology (UVM) components… more
- Renesas (San Jose, CA)
- …RTL, synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design constraints ... Senior Staff Engineer , Electrical Design Job Description +...support is a plus + Experience in DFT or physical design is a plus + Experience...plus + Experience in DFT or physical design is a plus + Experience with Verilog and/or… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …block and Chip top level You will also be responsible for interfacing with the Physical Design team on STA, timing closure and P&R, and participating in silicon ... of high-speed interfaces. Prior experience of collaborating with Physical Design teams in multiple successful ASIC/IP...Knowledge of the IP/SoC level timing closure flow and methodology . Strong command of synthesis, STA, design … more
- Siemens Digital Industries Software (Fremont, CA)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... ASIC team can provide. What You'll Do * You will author design specifications and participate in micro-architecture specification reviews. * Implement Verilog RTL… more
- Siemens Digital Industries Software (San Francisco, CA)
- …BSEE or MSEE + Experience using and strong working knowledge of physical verification, circuit verification, reliability verification, design for manufacturing, ... **Job Family:** Customer Services **Req ID:** 431392 As a Principal Customer Training Engineer , you will be responsible for all aspects of training delivery and… more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity you will focus on the electrical design ,… more
- Siemens Digital Industries Software (San Francisco, CA)
- …BSEE or BSCS required; MSEE desired * 3 to 8 years of experience as an Applications Engineer , ASIC Design Engineer or related field * Digital design ... **Req ID:** 427265 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... Country: United States State/Province: California City: San Jose **Summary** The Staff Engineer , Software develops, debugs, tests, deploys and supports code to be… more
- Gilead Sciences, Inc. (Foster City, CA)
- …Join Gilead and help create possible, together. **Job Description** **Sr. Quality Engineer - Combination Products, Tech Transfer and Commercial** This opportunity is ... these new product lines in the commercial stage, starting with collaborating with the design and development team on Design Transfer. We are looking for a… more
- Lightmatter (Mountain View, CA)
- …flows: Assist in the automation, development, deployment, and support of innovative verification, physical design methodology , and CAD flows. + Manage tools ... Infrastructure Engineer Lightmatter builds chips that enable extreme-scale artificial...+ Collaborate with EDA companies: Work closely with Electronic Design Automation (EDA) companies to provide Lightmatter engineers with… more
- Capgemini (San Francisco, CA)
- **Job role:** **Lead DV IP Verification Engineer ** **Job Location : San Francisco CA / Sunnyvale CA** **Job description:** Architect and Create verification ... environments using System-Verilog and UVM (Universal verification) methodology for IP verification. IP verification must have and SoC verification good to have.… more
- Siemens Digital Industries Software (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...competent leadership from our managers and executives. This Applications Engineer (AE) position delivers technical expertise for Functional Verification… more
- Siemens Digital Industries Software (San Francisco, CA)
- …in C/C++/SystemC and VHDL/Verilog/SystemVerilog is required. + Strong understanding of Digital design practices and methodology + Ability to code for synthesis ... **Req ID:** 428219 Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around the world to… more
- HP Inc. (Palo Alto, CA)
- ACS (Advanced Compute & Solutions) is seeking a Senior Software Engineer to lead ACS Software Development in our high growth, future-oriented businesses, including ... understand business requirements and define AI project goals. + Design & architect scalable and robust AI systems and...related field. + Proven experience as an Senior Software Engineer or similar role with focus on technology integrations.… more
- HP Inc. (Palo Alto, CA)
- This role is responsible for leading the design , implementation, and maintenance of complex software systems that meet specific business needs or technical ... compliers, networking, utilities, databases, and Internet-related tools. * Analyzes design and determines coding, programming, and integration activities required… more