- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- Belcan (Palo Alto, CA)
- Sr. Physical Design Engineer Job Number: 354330 Category: Design Engineering Description: Job Title: Sr. Physical Design Engineer Pay rate: ... Start Date: Right Away Keywords: #PaloAltoJobs; #PhysicalDesignEngineerjobs; Job Description: As a Sr. physical design engineer , you will contribute to all … more
- Capgemini (San Francisco, CA)
- ** Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San… more
- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams including … more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more
- Broadcom (San Jose, CA)
- …Power-grid and high speed clock constraints and specification. + Good understanding of physical design verification methodology to debug LVS/DRC issues at ... in Electrical Engineering or Computer Engineering with 10+ years of experience in Physical design . + Deep knowledge about industry standards in Physical … more
- Microsoft Corporation (Mountain View, CA)
- …SOCs, cloud accelerators, cloud servers, and clients. We are looking for a Senior Design Verification Engineer to work on leading edge IP (intellectual property) ... work and beyond. We are looking for a **Senior Design Verification Engineer ** to join the team....random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology … more
- Jacobs (San Francisco, CA)
- …up our communities today to improve tomorrow. We're looking for a mid-level Engineer to design geotechnical aspects of environmental remedial actions for complex ... pass your knowledge on to others. As a junior/mid-level Engineer , you'll be directed by Design Managers...field work for remediation projects, and an understanding of methodology and procedures * Experience working on active project… more
- Cisco (San Jose, CA)
- …hardware solutions. Your Impact * Be part of the development organization as an ASIC Design Engineer with primary focus on RTL Design * Create ... performance requirements * Help define, evolve, and support our design methodology * Collaborate with the verification...bugs and close code coverage * Work closely with physical design team to close design… more
- Cisco (San Jose, CA)
- …* Develop and analyze functional coverage. * Help define, evolve, and support our design methodology . * Collaborate with the verification team to address ... design bugs and close code coverage. * Work closely with the physical design team to close design timing and place-and-route issues. * Triage, debug, and… more
- Google (Mountain View, CA)
- …dependencies and deliverables. + Work closely with system, software, design , Design for testing (DFT) and physical implementation stakeholders to make ... using SystemVerilog for ASIC designs. + Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments. Preferred… more
- Cisco (San Jose, CA)
- …to meet timing and performance requirements. * Help define, evolve, and support our design methodology . * Mentor junior engineers on performing project tasks and ... address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * Triage, debug,… more
- Cisco (San Jose, CA)
- …Work With You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology , and tools. * Experience… more
- Motion Recruitment Partners (Palo Alto, CA)
- Senior Hardware Engineer Palo Alto, CA **Onsite** Contract $70/hr - $75/hr Physical Design Engineer As a Physical Design Engineer , you will ... contribute to all design phases of physical design of high performance SoC ...to GDSII. You will collaborate with the Foundry Process Engineer , SoC Architect, Microarchitecture, Packaging, Signal Integrity and Power… more
- TE Connectivity (San Francisco, CA)
- Principal Signal Integrity Engineer - Data & Devices At TE, you will unleash your potential working with people from diverse backgrounds and industries to create a ... sustainable and more connected world. **Job Overview** As a Principal Signal Integrity Engineer for TE Connectivity you will focus on the electrical design ,… more
- General Motors (Mountain View, CA)
- …commerce. We are looking for a highly skilled and experienced **Staff Salesforce Engineer ** to lead the architecture, design , and development of enterprise-level ... and drive continuous improvement in our Salesforce ecosystem. As a Staff Salesforce Engineer , you will guide technical teams, mentor engineers, and play a key role… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... Country: United States State/Province: California City: San Jose **Summary** The Staff Engineer , Software develops, debugs, tests, deploys and supports code to be… more
- Stanford University (Stanford, CA)
- Research and Development Scientist and Engineer **School of Engineering, Stanford, California, United States** Research Post Date Nov 21, 2024 Requisition # 105283 ... focused on a fundamental understanding of organic electronic material design with skin-like properties (flexible, stretchable, self-healing, and biodegradable) and… more
- Broadcom (San Jose, CA)
- … methodology , power planning and analysis, timing closure, signal integrity and physical design checks. Chip level expertise in DRC/LVS Calibre tools. Ability ... you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including Floorplanning,… more