- Cadence Design Systems, Inc. (San Jose, CA)
- …make an impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC ... include a minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development + Working knowledge of a set of common SerDes standards and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …simulation is requiredin setup and usage of simulation and/or layout applications for IC Design . RF experience, including RF simulation and EM simulation, is ... with how to help customers solve their most challenging custom IC and system design and simulation problems using Cadence technology. This is a customer-facing… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …driving customer engagements, you will enhance your in-depth knowledge in nanometer design , unlock unique expertise in digital design implementation, and level ... and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts...and Static Timing Analysis is required Prior experience with IC digital implementation flows and backend EDA tools including… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …provide in-depth technical assistance to help support advanced verification flows to secure design wins Champion the customer needs and work closely with R&D and ... Experience in writing scripts (Perl, Python or Tcl) Strong software, HDL design and verification skills Ability to quickly analyze verification environments and … more
- Cadence Design Systems, Inc. (San Jose, CA)
- …in collaboration with R&D to help support advanced verification flows to secure design wins Champion the customer needs and work closely with R&D and marketing ... technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design… more
- Broadcom (San Jose, CA)
- …well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer, the ideal candidate will be responsible for the 3nm high speed ... EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and...12+ years, or ME plus 10+ years, in deep-sub-micron IC physical designs, or equivalent experience Experience with TCL… more
- ManpowerGroup (San Jose, CA)
- …and layout size optimization of CMOS JI and SOI + Collaborate with Analog and Power IC design engineers in Asia and the US + Manage tape-out process, data ... Mobile, Consumer, IoT, and Industrial applications is seeking an experienced Principal Layout Engineer. **RESPONSIBILITIES:** + Layout of Power and Analog integrated… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …in the context of multiple flows including high speed signal and/or power design , signal and power integrity. Design experience and industry knowledge of ... Signal, Power, and Thermal analysis for IC , package, and PCB designs are required. The candidate...Electromagnetics, Thermal, and RF related to Package and PCB Design are required. Candidate should have experience in Cadence… more
- Qualcomm (San Jose, CA)
- …(eg, RTL to GDS Flow, Virtuoso) to execute and enable advanced architecture and design of multiple complex blocks/SoC or IC Packages. * Writes and reviews ... for all. As a Qualcomm Digital ASIC Engineer, you will define, model, design , optimize, verify, validate, implement, and document IP (block/SoC) development for a… more