- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with a scripting language like… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Hands-on work with Cadence customers in the areas of Frontend Digital Design Implementation including Synthesis, DFT and Logical Equivalence, Low Power, Power ... field, plus 8+ years industry experience. Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is required. Prior… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + IP integration and ... and developing flows at all phases of the digital design and functional verification. It is further expected that...well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate… more
- Google (Mountain View, CA)
- …of RTL and functionality from a full chip perspective, collaborate with RTL design and architecture. Develop and own full chip timing constraints. + ... of High Performance ASICs. + Experience building ASIC implementation flows ( RTL -to-GDS2). Preferred qualifications: + Master's degree or PhD in Electrical… more
- Renesas (San Jose, CA)
- Senior Staff Engineer , Electrical Design Job Description + Propose, Architect, and Design RTL in Verilog for use in a Mixed Signal Integrated Circuit + ... RTL , synthesized, and post route netlists + Fluent in Verilog RTL coding and ASIC design methodology is a must + Competence in developing design … more
- Lightmatter (Mountain View, CA)
- …and efficient inference and training engines. We are hiring a Sr. Staff Digital Design Engineer to help lead ASIC development for the next-generation artificial ... define the next advance in computer architecture! Responsibilities + Implementation of RTL design according to architecture specifications for advanced ML/AI… more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a **Silicon** ** Design Engineer ** **2** to work on leading edge custom IP development as ... will be responsible for microarchitecture and Register Transfer Level ( RTL ) implementation of IP blocks, working with a group...of IP blocks, working with a group of other design team members, as well as design … more
- BAE Systems (San Jose, CA)
- …on position level and/or job specifics. **Senior Principal Front End ASIC Design Engineer (Hybrid)** **102613BR** EEO Career Site Equal Opportunity Employer. ... level chip designer who has strong proficiency in both + ASIC design - performing architecture design , RTL coding/simulation, timing closure at layout phase +… more
- Google (Fremont, CA)
- …and static timing analysis tools. + Experience in Verilog or SystemVerilog HDL for RTL design , verification, and scripting languages (eg, Python, Perl) for ... unparalleled performance, efficiency, and integration. As the Senior Logic Design Engineer , you will play a pivotal...to define microdisplay panel logic architecture and specifications. + Design and implement RTL for various digital… more
- Cisco (San Jose, CA)
- …an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... design Team which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities will… more
- Meta (Menlo Park, CA)
- …IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development 2. RTL development using ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...one of these skills (minimum 3 years): Micro-architecture and RTL development for complex control and data path IPs,… more
- Siemens Digital Industries Software (Fremont, CA)
- … methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, LEC, STA analysis o Integration and validation of ... Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around...the increasingly complex world of chip, board and system design . **Job Overview** Siemens EDA is seeking a senior… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience working with microarchitecture or … more
- Micron Technology, Inc. (San Jose, CA)
- …build design architecture spec documents for the new features * Assist in design and development of schematics and/or RTL blocks _Lead and Develop Projects ... Device, System, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …years of prior experience strongly preferred. Prior experience in timing and or RTL design of high-speed interfaces. Prior experience of collaborating with ... of technology. As a core member of the PHY Design team, your responsibilities will span across various aspects...various aspects for the ASIC frontend flow, which includes RTL integration, maintain the timing constraint, Synthesis, Place and… more
- Power Integrations (San Jose, CA)
- …and high voltage AC/DC technical experience is preferable. Solid understanding of digital design , RTL synthesis, verilog AMS, system verilog, and familiarity of ... circuits using CMOS/Bipolar analog/digital circuitry. Technical responsibilities include: circuit design (mostly digital, some analog), simulation, layout supervision and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Principal Application Engineer responsible for providing pre-sales and post-sales technical support for the Digital ... + Bachelor's degree with at least 3-6 years of design /EDA experience or Master's degree with at least 4...ASIC digital implementation flows and EDA tools is required, RTL to GDSII ; Experience with advanced nodes (7nm… more
- Integense (San Jose, CA)
- …by applying a holistic system-level approach combined with creative circuit design , proprietary silicon process technology and materials engineering, to provide ... a Senior / Principal Member of Technical Staff, Digital Design . This is an exciting opportunity to join the...Experienced in all Front and Back End activities - RTL , Verification, Synthesis, STA, DFT, ATPG, etc. + Adept… more
- Stryker (San Jose, CA)
- …A motivated EE student who is passionate about designing PCBAs and/or FPGA RTL in the context of medical devices. What you will do: Technical Responsibilities: ... * Design and develop electrical components for medical devices *...Under supervision, conduct research and studies to support product design Business Responsibilities: * Interpret customer needs and understands… more
- Vector Atomic (Pleasanton, CA)
- …for EDA tools, preferably TCL or Python + Understanding of practical RTL design issues (latency, jitter, metastable behavior, hold/setup time, multicycle ... you! Position Summary We are seeking a Senior FPGA Engineer to join our team and contribute to the...requirements and select FPGA/SoC parts + Assist in the design of custom PCBs based on modern FPGA/SoC devices… more