- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with a scripting language like… more
- Google (Mountain View, CA)
- …technology lead driving Physical Implementation for complex ASIC project(s). + Experience with pre- silicon and post- silicon Design For Test (DFT). + ... RTL and functionality from a full chip perspective, collaborate with RTL design and architecture. Develop and own full chip timing constraints. + Perform… more
- Microsoft Corporation (Mountain View, CA)
- …high-performance Azure cloud servers, clients, and augmented reality. We are looking for a ** Silicon ** ** Design Engineer ** **2** to work on leading edge ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...will be responsible for microarchitecture and Register Transfer Level ( RTL ) implementation of IP blocks, working with a group… more
- Google (Mountain View, CA)
- …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power...Silicon Validation teams to ensure functionality of the design . + Provide input on synthesis, timing closure, and… more
- Actalent (West Menlo Park, CA)
- Job Title: Silicon DD Engineer IIIJob Description The team...years of experience as a Digital Design Engineer + Recent experience with IP RTL coding ... within the past 2-3 years + Experience having worked on a design from scratch + Experience in RTL coding and coding for low power in ASICs + Experience in… more
- Cisco (San Jose, CA)
- …an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... silicon validation phases with additional exposure to physical design signoff activities. What You'll Do You will be...which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer … more
- Microsoft Corporation (Mountain View, CA)
- …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Verification Engineer ** to work on leading edge IP (intellectual property) ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...also be valuable + System Verilog and UVM. + Design register-transfer level( RTL )/hardware experience. + Understand C… more
- Lightmatter (Mountain View, CA)
- …and efficient inference and training engines. We are hiring a Sr. Staff Digital Design Engineer to help lead ASIC development for the next-generation artificial ... define the next advance in computer architecture! Responsibilities + Implementation of RTL design according to architecture specifications for advanced ML/AI… more
- Cisco (San Jose, CA)
- Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco's silicon team provides a ... for ASIC engineers by combining the resources offered by a large multi-geography silicon organization and a large campus (with onsite gym, healthcare, and cafe,… more
- Micron Technology, Inc. (San Jose, CA)
- …Engineering wrt validation plan and review Silicon result * Assist in silicon design validation, reticle experiments, qual and tape-out revisions as needed ... spec documents for the new features * Assist in design and development of schematics and/or RTL blocks _Lead and Develop Projects and Team (Leads)_ *… more
- Meta (Menlo Park, CA)
- …IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Micro-architecture development 2. RTL development using ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to build...power **Minimum Qualifications:** Minimum Qualifications: 7. 3+ years of silicon development experience 8. Experience with Verilog or System… more
- Siemens Digital Industries Software (Fremont, CA)
- …design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, LEC, STA analysis o Integration and validation of ... Siemens EDA is a global technology leader in electronic design automation software. Our software tools enable companies around...Silicon -on-Chip IP integration and validation o Place and Route… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …years of prior experience strongly preferred. Prior experience in timing and or RTL design of high-speed interfaces. Prior experience of collaborating with ... of technology. As a core member of the PHY Design team, your responsibilities will span across various aspects...various aspects for the ASIC frontend flow, which includes RTL integration, maintain the timing constraint, Synthesis, Place and… more
- Integense (San Jose, CA)
- …by applying a holistic system-level approach combined with creative circuit design , proprietary silicon process technology and materials engineering, to ... a Senior / Principal Member of Technical Staff, Digital Design . This is an exciting opportunity to join the...Front End and Back End responsibility. + Collaborating with silicon designers and systems engineers in San Jose, San… more
- Power Integrations (San Jose, CA)
- …and high voltage AC/DC technical experience is preferable. Solid understanding of digital design , RTL synthesis, verilog AMS, system verilog, and familiarity of ... circuits using CMOS/Bipolar analog/digital circuitry. Technical responsibilities include: circuit design (mostly digital, some analog), simulation, layout supervision and… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …years of overall experience + Experience working with DDR5/4, LPDDR5/4 IP. + Verilog RTL design and gate level verification experience. + Synthesis and STA ... responsible for IP activities including but not limited to Pre- Silicon integration and Post silicon bring-up and...reviews, and integration questions. + Perform and help debug RTL and gate level simulations to verify functionality. +… more
- Cisco (San Jose, CA)
- … design & DFT, Signal Integrity, and complexed packaging technology. Our silicon is developed using sophisticated VLSI design techniques in the latest ... of engineering fundamentals and technical problem-solving skills * Familiarity with ASIC design flow, including RTL (Register Transfer Level) design … more
- Siemens Digital Industries Software (San Francisco, CA)
- …Applications Engineer , ASIC Design Engineer or related field * Digital design experience and RTL coding with Verilog or VHDL or both * Proven track ... Siemens EDA is a global technology leader in Electronic Design Automation software. Our software tools enable companies around...* Willing to develop deep product knowledge for the Silicon Test Solutions products and has the competent technical… more
- Lightmatter (Mountain View, CA)
- …enable extreme-scale artificial intelligence computing clusters. If you're a collaborative engineer or scientist with a passion for innovation, solving challenging ... of process technology, state of the art in chip design , and clear communication skills. You will represent the...hardware against simulation prediction. + Actively collaborate with the RTL and DV teams to enable block-level implementation and… more