- Capgemini (San Francisco, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 7+ years of ASIC Design experience. * Experience with Verilog/System Verilog * Interactive and ... Master's degree in Electrical or Computer engineering and 4+ years of ASIC Design experience. * Scripting experience (Python, Perl, TCL, shell programming). *… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... with 4+ years of ASIC design experience. * Prior experience working with Verilog or System Verilog programming skills * Experience with… more
- Cisco (San Jose, CA)
- …to first customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development of ... years of related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. *… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer ** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design ...**Title:** _Senior E/E & Semiconductor Engineer - ASIC Physical Design Engineer_ **Location:** _CA-San Francisco_… more
- Cisco (San Jose, CA)
- …Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification using ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...Business Unit is on the lookout for a driven Senior Verification Engineer to join us in… more
- Cisco (San Jose, CA)
- …/lead to engage in new development of our UCS family. You will have an ASIC design and verification background with hands-on experience in RTL verification and ... for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent experience. *… more
- Cisco (San Jose, CA)
- …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. *Additionally, you'll develop methodologies, guidelines, and… more
- Cisco (San Jose, CA)
- …being developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. One of ... and Wireless products. With approximately 2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various… more
- Google (Mountain View, CA)
- … design tools. Minimum Qualifications: + At least 10 years experience in ASIC physical design flows and methodologies in advanced nodes. + Experience from ... can flourish. We are seeking a highly motivated Hardware Engineer to join our team and contribute to development...+ Hands on experience and a solid understanding of ASIC physical design , physical design … more
- Capgemini (San Francisco, CA)
- …DV Engineer ** **Job Location:** **San Francisco CA** **Job Description** We are seeking Senior Design Verification Engineer for our Full Time role with ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Design Verification Engineer_ **Location:** _CA-San Francisco_… more
- Capgemini (San Francisco, CA)
- **Job Role:** **Physical Design (Synthesis) Engineer ** **Job Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC /SOC ... _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - Physical Design (Synthesis) Engineer_ **Location:** _CA-San… more
- Teledyne (Mountain View, CA)
- …for current and emerging challenges. Teledyne Microwave Solutions is hiring a Digital Design Engineer that will be responsible for the digital design ... development and service issues + Advanced level experience with digital and ASIC design + Advanced level experience with RISC or ARM-based microcontrollers +… more
- Broadcom (San Jose, CA)
- …and features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for ... some of the most complex and cutting edge networking ASIC 's and multi-chip solutions to market over the last...EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and… more
- Google (Mountain View, CA)
- …+ 5 years of experience leading digital verification using SystemVerilog for ASIC designs. + Experience developing and maintaining design verification (DV) ... test environments. Preferred qualifications: + Experience in creating detailed block-level design verification strategies and plans. + Experience creating or using… more
- Google (Mountain View, CA)
- …design concepts, and languages such as Verilog or SystemVerilog. + Experience with ASIC design methodologies for clock domain checks, reset checks and low ... practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog. + 5… more
- Broadcom (San Jose, CA)
- …that keep the globe connected. Our ASIC products division is looking for senior , physical design engineering veterans to guide teams designing some of the ... Technical Lead for Physical Designs Are you a versatile, senior engineer capable of leading external and... design verification and sign-off. 6. Knowledge of ASIC design flow including physical design… more
- Capgemini (San Jose, CA)
- **Job Role: Senior ** **Performance Modeling Engineer ** **Job Location: San Jose CA** **Job description:** We are seeking a highly skilled candidate with a strong ... candidate will have a deep understanding of System-on-Chip (SoC) design and architecture, as well as Expertise in performance...+ Experience with Synopsys or Cadence EDA tools and ASIC /SOC Power Analysis Tools. + Deep understanding of SoC… more
- Cisco (San Jose, CA)
- Who We Are Cisco Silicon One is the center of Cisco's ASIC design and is driving the development of next-generation network devices for the 5G and AI era. Our ... design teams to define the next generation of ASIC products being developed. You will work cross-functionally with...Engineer . * Experience in building software stack for ASIC or similar network processors. * Ability to constantly… more
- quadric.io, Inc (Burlingame, CA)
- …to get in on the ground floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will contribute to all stages of ... or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front-end design + Proficiency in SystemC, SystemVerilog, or Verilog + Strong background… more