- Cisco (San Jose, CA)
- …to first customer shipments. What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching products. * Development ... of related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology, and tools. *… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in EE, CE, or other related field. * 7+ years of related ASIC design verification experience. * Proficient in ASIC verification ... design in emulation. * Oversee and manage the ASIC bring-up process. Who You Are The Core Hardware...Business Unit is on the lookout for a driven Senior Verification Engineer to join us in… more
- Cisco (San Jose, CA)
- …* Bachelor's Degree in Electrical or Computer Engineering with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering ... functional coverage. * Help define, evolve, and support our design methodology. * Collaborate with the verification ...with 4+ years of ASIC design experience. * Prior experience working… more
- Capgemini (San Francisco, CA)
- **Physical Design Engineer** **Job Description:** **The ASIC Physical Design Engineer will be responsible for taking ownership of the physical chip ... top level and/or blocks, with experience across the complete ASIC /SOC design flow including routing, static timing...Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level *Understanding constraints… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Verilog/System Verilog programming experience. * Interactive ... project tasks and problem solving. * Collaborate with the verification team to address design bugs and...in Electrical or Computer engineering and 8+ years of ASIC Design experience. * Experience resolving setup… more
- Broadcom (San Jose, CA)
- …Logic design , chip architecture, microarchitecture, Verilog RTL coding Front-end logic design verification , DRC, logic synthesis + Knowledge of DFT methods ... Candidate Account, please Sign-In before you apply.** **Job Description:** ** Senior Custom ASIC Engineering Lead** Are you...and internal cross-functional teams in areas such as physical design , STA, DFT, and packaging? Have you taped out… more
- Cisco (San Jose, CA)
- …* Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design experience. * Experience with Verilog and System Verilog programming. ... project tasks and problem solving. * Collaborate with the verification , PD, DFT, Package and SW teams to develop...in Electrical or Computer engineering and 8+ years of ASIC Design experience. * Experience in Data… more
- Cisco (San Jose, CA)
- …* Be responsible for ASIC bring up Minimum Qualifications * 8+ years ASIC design verification experience with Bachelor's or Master's degree in equivalent ... Core Hardware Business Unit is looking for a motivated Senior Verification engineer/lead to engage in new...development of our UCS family. You will have an ASIC design and verification background… more
- Cisco (San Jose, CA)
- …hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various ... correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. *Additionally, you'll develop methodologies, guidelines, and… more
- Capgemini (San Francisco, CA)
- …and Maintain CAD Infrastructure:** Create and manage CAD tools and environments to support ASIC design and verification processes. . **Support Design ... seeking a skilled CAD Infrastructure Lead to support our ASIC design team. The ideal candidate will...** Design Verification :** Assist in the verification of ASIC designs, ensuring they meet… more
- Cisco (San Jose, CA)
- …being developed in the industry. What You'll Do You will participate in the ASIC design verification and Emulation for Cisco high-end switching products. ... teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK...with System Verilog * 4+ Years of experience with ASIC Verification processes, methodologies, flows and tools… more
- Capgemini (San Francisco, CA)
- … DV Engineer** **Job Location:** **San Francisco CA** **Job Description** We are seeking Senior Design Verification Engineer for our Full Time role with ... basic tests, compile, and build hex code for processor tests. + Engage in design verification involving concurrency and simultaneous memory access. + Define and… more
- Microsoft Corporation (Mountain View, CA)
- …that mission. **The AI Silicon Engineering (** **AISiE** **) SoC Design Verification team is** **seeking** **a** ** Senior ** ** Design Verification ** ... will depend on you leveraging your deep understanding of design verification with your DevOps skillset to...in SOC development cycles and methodologies + Experience in ASIC workflow Silicon Engineering IC4 - The typical base… more
- Google (Mountain View, CA)
- …SystemVerilog for ASIC designs. + Experience developing and maintaining design verification (DV) testbenches, test cases, and test environments. Preferred ... qualifications: + Experience in creating detailed block-level design verification strategies and plans. + Experience creating or using verification … more
- Google (Mountain View, CA)
- … design tools. Minimum Qualifications: + At least 10 years experience in ASIC physical design flows and methodologies in advanced nodes. + Experience from ... + Hands on experience and a solid understanding of ASIC physical design , physical design ...and methodologies including synthesis, place and route, STA, Formal Verification , CDC and Power Analysis using tools such as… more
- Teledyne (Mountain View, CA)
- …summarizing development and service issues + Advanced level experience with digital and ASIC design + Advanced level experience with RISC or ARM-based ... module interfaces, conducts design reviews, and participates in design implementation. Responsibilities include debugging, verification , and resolving… more
- Google (Mountain View, CA)
- …design concepts, and languages such as Verilog or SystemVerilog. + Experience with ASIC design methodologies for clock domain checks, reset checks and low ... field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or… more
- Capgemini (San Francisco, CA)
- …Location : San Jose CA** **Job Description** + At least 7 years of experience in ASIC /SOC project design and development + Hands on with Cadence tools, DFT flow ... It delivers end-to-end services and solutions leveraging strengths from strategy and design to engineering, all fueled by its market leading capabilities in AI,… more
- Cisco (San Jose, CA)
- …debug and diagnostics needs of the design . * Work closely with the design / design - verification and PD teams to enable the integration and validation of ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with...BIST and boundary scan. * Prior experience with hardware design specifications and verification plan/matrix, RTL &… more
- Capgemini (San Jose, CA)
- **Job Role: Senior ** **Performance Modeling Engineer** **Job Location: San Jose CA** **Job description:** We are seeking a highly skilled candidate with a strong ... candidate will have a deep understanding of System-on-Chip (SoC) design and architecture, as well as Expertise in performance...+ Experience with Synopsys or Cadence EDA tools and ASIC /SOC Power Analysis Tools. + Deep understanding of SoC… more