- Cadence Design Systems, Inc. (San Jose, CA)
- …a deep technical knowledge and understanding of digital and mixed-signal verification including logic simulation, formal property analysis, protocol verification ... campaigns externally with customers. + Must have a knowledge of AI/ML verification methods and functional safety/security/radhard verification . + Must have… more
- BAE Systems (San Jose, CA)
- …and verification methodologies (VCS simulator, UVM) + Proficient in ASIC / FPGA timing closure/area optimization techniques + Hands on Experience with ... cores Buses, Controllers, PHYs, etc with other logic within ASIC / FPGA + Coordinate interoperability of digital modules...be available based on position level and/or job specifics. ** Senior Principal Front End ASIC Design Engineer… more
- GE HealthCare (Palo Alto, CA)
- …with System Verilog and VHDL code to understand FPGA -based designs; familiar with transitioning FPGA solutions to ASIC * Scope and define ASIC test and ... **Job Description Summary** This Senior Architect position will be responsible for guiding...Resonance (MR) systems. The successful candidate will interface with ASIC simulation & design teams, and Hardware Subsystem teams… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …DDR4/5, LPDDR4/5/5X, HBM2/3, GDDR6* Perl/Python Scripts* Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San...RTL design in Verilog, System Verilog and FPGA design* Knowledge of AXI, DFI protocols* Working knowledge… more