- Apple (Beaverton, OR)
- …team will enable our customers to do all the things they love with their devices. The DFT Design Verification Engineer will be on a team which is responsible ... and support for silicon bring-up of GPU core. Description As a DFT Verification engineer your primary responsibilities will include Reviewing Architecture… more
- Intel (Hillsboro, OR)
- …implementation. Reviews the verification plan and drives verification of the DFT design to achieve desired architecture and microarchitecture specifications. ... write and generate RTL and structural code to integrate DFT . Optimizes logic to qualify the design to meet power, performance, area, timing, test coverage, DPM,… more
- Apple (Beaverton, OR)
- …Description As a DFT engineer we are involved with the complete DFT solution for a design project, you will have responsibilities spanning all aspects of ... semiconductor design . Developing and implementing DFT architecture Implementing DFT infrastructure Working with the DV team to verify DFT implementations… more
- Apple (Beaverton, OR)
- … to join our exciting team of problem solvers. Description As a DFT Verification engineer your primary responsibilities will include Reviewing Architecture and ... Perl, Python or TCL Strong Object-Oriented Programming skills Solid Understanding of Design Verification (DV) methodologies for verifying DFT implementation in… more
- Apple (Beaverton, OR)
- …like changing the game? We have an opportunity for a visionary and uncommonly talented DRR Design Engineer . As a member of our dynamic group, you will have the ... designs for high-performance, low power applications. As a logic design engineer , you will be involved in... For Test, understanding of scan concept and writing DFT friendly RTL Unified Power Format for simulation, synthesis… more
- Intel (Hillsboro, OR)
- …improvements and resolve issues throughout the entire product lifecycle. The Senior Silicon Design Engineer will be responsible for, but not limited to: ... analysis, multiple power domain analysis, placing, routing, synthesis, and DFT using industry standard EDA tools. Optimizes design... DFT using industry standard EDA tools. Optimizes design to improve product level parameters such as power,… more
- Apple (Beaverton, OR)
- …changing the game? We have an opportunity for a forward-thinking and uncommonly hardworking RTL Design Engineer . As a member of our dynamic group, you will have ... this role, you will have the opportunity to specify, design , and help in the verification and lab bring-up...clock-domain crossing checkers) Working knowledge of synthesis, static timing, DFT is a huge plus Deep knowledge of System-Verilog… more
- Intel (Hillsboro, OR)
- …a high performing team specializing in clocking architecture, clock distribution network design , custom clock circuits, clock tree synthesis, and low power design ... will include but not be limited to Performs physical design implementation of custom CPU designs from RTL to...multiple power domain analysis, structured placement, routing, synthesis, and DFT . Works intimately with industry EDA vendors to build… more
- Apple (Beaverton, OR)
- …iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer who can drive CPU multi-level cache subsystem architecture and RTL development for ... multi-processor systems. Description As a CPU Cache Microarchitect/RTL Engineer , you will own or participate in the following: Micro-architecture development and… more
- Apple (Beaverton, OR)
- … design flow and verification methodologies Good understanding of DFT requirements for SOCs Experience writing Verilog, SystemVerilog, SVA hardware description ... an opportunity for a forward-thinking and especially motivated Analog Mixed Signal IP Integration Engineer ! As a member of our dynamic group, you will have the rare… more
- NVIDIA (Hillsboro, OR)
- We are now looking for a CPU Design Methodology Engineer ! The complexity of chip development has greatly increased over the years. We are now packing tens of ... NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design ...complex chips and interact directly with unit-level ASIC, Physical Design , CAD, Package Design , Software, DFT… more
- Fujifilm (Salem, OR)
- **Position Overview** The HL7 Integration Engineer (IE) for Canadian region oversees all technical aspects of Synapse product HL7 integration, from install, ... knowledge in all areas of medical informatics, IT infrastructure design and deployment, medical imaging industry in general and...Strong knowledge of HL7 v2 (ADT, ORM, ORU, SIU, DFT , MDM), DICOM, FHIR, and IHE profiles. + Familiarity… more
