• Physical Design Lead

    Google (Sunnyvale, CA)
    …of static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful tape-outs ... final timing sign-off for complex Application-specific integrated circuits (ASIC). + Lead both static timing analysis methodology development and support,… more
    Google (12/21/24)
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  • Design Engineer Architect/ Lead

    Broadcom (San Jose, CA)
    …content and coding styles that will lend itself to seamless closure in the physical design backend flows, help define and influence sub-system content for memory ... before you apply.** **Job Description:** **Technical Skills/ background:** The Design Architect/ Lead will lead ...timing constraints with the customer and interface with the physical design team to aid in overall… more
    Broadcom (11/22/24)
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  • AE Director - Physical Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …and success rate in next engagements Job Requirements Minimum + 15+ years of industry Physical Design experience with 4+ years of managing a team + BS degree ... Electrical, Engineering, or related field + Strong knowledge in Digital Design Fundamentals, Semiconductor fundamentals, and Static Timing Analysis is… more
    Cadence Design Systems, Inc. (10/31/24)
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  • ASIC Design for Test Technical Leader

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
    Cisco (11/15/24)
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  • ASIC Design for Test Engineer

    Cisco (San Jose, CA)
    …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through...and post silicon validation phases with additional exposure to physical design signoff activities. What You'll Do… more
    Cisco (11/01/24)
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  • Design Engineering Architect

    Cadence Design Systems, Inc. (San Jose, CA)
    …synthesis, static Timing analysis and closure, DFT, Low power design techniques, Physical verification.* Deep knowledge and experience with Cadence ... to join this exciting growth opportunity and help us lead the industry with Cadence IP products for silicon...you want to make a difference and be challenged? Design Engineering Architect in physical design more
    Cadence Design Systems, Inc. (12/04/24)
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  • Digital Design Engineer

    Broadcom (San Jose, CA)
    design trade-offs. You will collaborate closely with verification engineers and physical design teams to ensure functional correctness, timing closure, and ... crossings. **Key Responsibilities:** **Technical Leadership and Domain Expertise:** + Lead the design and implementation of advanced...and Timing Closure:** + Perform synthesis and work with physical design teams to achieve timing closure… more
    Broadcom (12/18/24)
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  • Lead STA Solutions Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Computer Engineering. + Expert in Static Timing Analysis with knowledge of Physical Design and ECO flows, Power, Extraction. + Good understanding of Cadence ... Execute and deliver on timing analysis, ECO flows, Extraction, Power, EMIR and/or physical design and ensure integrity of delivered solutions. Individual should… more
    Cadence Design Systems, Inc. (12/20/24)
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  • Lead Software Engineer, Synthesis

    Cadence Design Systems, Inc. (San Jose, CA)
    …Solution product. Genus is a complete product that encompasses logic synthesis and physical design . The product breadth means we are looking for skilled ... and innovators who want to make an impact on the world of technology. Cadence Design Systems is looking for a highly motivated software engineer to work as a member… more
    Cadence Design Systems, Inc. (11/13/24)
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  • Finite Element Analysis Engineer

    Snap Inc. (Palo Alto, CA)
    …dynamic structural simulations using Abaqus or Ansys on consumer grade hardware. + Lead and coordinate with partner teams _(Product Design , Reliability, Quality, ... validate the predictions of the simulated results. + Work with product design engineers on evaluation, verification/validation, and design optimization. +… more
    Snap Inc. (12/27/24)
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  • ASIC STA Engineer

    Cisco (San Jose, CA)
    …strategies, and correlation between PNR, Spice, and STA, along with advising the Physical Design team on best practices. * Additionally, you'll develop ... refining design and timing constraints for seamless physical design closure. As part of this...lead on backend timing signoff, including CDC checks, static timing verification, and silicon debugging. Who You Are… more
    Cisco (11/08/24)
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  • Sr. Security Engineer, Device Services Security

    Amazon (Sunnyvale, CA)
    …launch efforts to improve security execution within your partner org. You will lead implementation of security that gets trustworthy products to market quickly. In ... Leadership principle. You are the expert who finds the kinds of defects that static analysis tools miss. You will be responsible for driving better security outcomes… more
    Amazon (11/16/24)
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  • CPU Floorplan and Integration Engineer

    Qualcomm (Santa Clara, CA)
    …+ Experience as a key technical lead driving development and delivery of physical design databases is a plus + Solid understanding industry standard tools ... and Integration Engineer, you will work with microarchitecture, RTL design and physical design teams...within a team environment. + In-depth understanding of extraction, static timing analysis (STA), and electromigration and IR drop… more
    Qualcomm (12/05/24)
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  • Student-Athlete Career Preparedness & Alumni…

    Stanford University (Stanford, CA)
    …Career Preparedness & Alumni Mentorship Coach **Department of Athletics, Physical Education, and Recreation, Stanford, California, United States** Athletics Post ... Sep 04, 2024 Requisition # 104486 _Stanford's Department of Athletics, Physical Education and Recreation ("DAPER") is the premier intercollegiate athletics program… more
    Stanford University (12/05/24)
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