- quadric.io, Inc (Burlingame, CA)
- …Happiness What We Expect: Initiative, Collaboration, Completion Role As a member of our physical design methodology team you will be tasked with developing ... physical design methodologies and automation scripts for multiple design configurations across multiple process nodes. Responsibilities + Develop Quadric… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- Google (Sunnyvale, CA)
- …tool workflows in semiconductor environments. + Experience developing and supporting ASIC physical design flows and methodologies in process nodes. + Experience ... and analyzing trends. + Expertise in one or more aspects of physical design implemenation, including 2.5D and 3DIC integration and signoff, IP integration, chip… more
- Google (Mountain View, CA)
- …(ie, Python, Bash, Tcl) for workflow automation and data visualization. + Experience with physical design flow development and design closure for multiple ... of experience with SoC Integration focused on low power design . + Experience with new process technology based SoC...integration and sign-off. + Experience in extraction of ASIC design parameters, Quality of Results (QoR) metrics, and analyzing… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- NVIDIA (Santa Clara, CA)
- We are looking for a Senior CPU Implementation Methodology Engineer to join our VLSI team! If you are looking for a challenging and exciting role and you are a ... from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical ...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …+ Engage with EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology . + Design optimization of 3D advanced silicon/package ... 3D-IC Test Chips validation of 3D-IC technology platforms and design methodology . What we need to see:...Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT,… more
- NVIDIA (Santa Clara, CA)
- …today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order to ... needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation and… more
- Qualcomm (Santa Clara, CA)
- …create designs that push the envelope on performance, energy efficiency and scalability. As CPU Physical Design CAD engineer , you will build and support the ... flows, and resolve project-specific issues + Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. ... design such as Clocking, Power Delivery and Partition synthesis/APR. - Drive physical design and timing closure including FEV, LVS, DRC, and reliability… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated ASIC Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a ... inventiveness and intelligence. What you'll be doing: + Drive physical design and timing of high-frequency and...experience to improve the convergence flows working with the Methodology Team. What we need to see: + BS… more
- Google (Sunnyvale, CA)
- …Experience leading one or more aspects of physical design or physical design flow/ methodology , to successful tape-outs and shipping silicon. + ... and timing ECO creation). + Experience in working across various physical design areas (ie, EDA scripting, block level synthesis, floorplanning, place and… more
- Qualcomm (Santa Clara, CA)
- …> CPU Engineering **General Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification, you will work with architecture, ... Responsibilities + Work with chip leads to understand the design methodology and high level requirements in...* Leverages advanced knowledge of computer architecture, micro-architecture, logic design , circuits, and/or physical design … more
- NVIDIA (Santa Clara, CA)
- We are looking for SOC Design Engineer ! The complexity of the chip has greatly increased over the years. We are now packing tens of billions of transistors in a ... and Tegra chips and interface, directly with unit-level ASIC, Physical Design , CAD, Package Design ,...are creative, collaborative, and have a real passion for design methodology and automation, we want to… more
- Skyworks (San Jose, CA)
- Sr. Silcon RFIC Design Engineer Apply now " Date:Jun 14, 2024 Location: San Jose, CA, US Company: Skyworks If you are looking for a challenging and exciting ... of world-class products, and see your valuable inputs directly translate into improved design methodology , business culture, and work environment. Join us to… more
- Microsoft Corporation (Mountain View, CA)
- …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Verification Engineer ** to work on leading edge IP (intellectual property) ... constrained random stimulus, scoreboards and checkers, and assertions to verify design correctness. + Develop Universal Verification Methodology (UVM) components… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. ... & Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA,...- Should be able to work closely with IP Design teams and Backend Physical Design… more
- Microsoft Corporation (Mountain View, CA)
- …functions in an extremely efficient manner. We are looking for a **Principal Design Verification Engineer ** to work in the dynamic Microsoft Artificial ... System on Chip (AISoC) Silicon team. You will be part of the design verification team, driving many facets of high performance, high bandwidth designs. Microsoft's… more
- Siemens Digital Industries Software (Fremont, CA)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more
- Cisco (San Jose, CA)
- …team to address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues. * ... ASIC team can provide. What You'll Do * You will author design specifications and participate in micro-architecture specification reviews. * Implement Verilog RTL… more