- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are now looking for a motivated Physical Design and Timing Engineer - Intern to join our dynamic and ... something great, join us today! What you'll be doing: + You will drive physical design , power, and timing of high-frequency and low-power designs. + Help in… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the ... inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off...most sophisticated strategies of signing off timing in design for world-class silicon performance.… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... design space, create optimum floorplan, drive synthesis, physical implementation, and timing closure by understanding... design and implementation. + Hands-on experience in physical synthesis, floor planning, P&R, and timing … more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... interfacing with cross-functional teams, IP, and EDA vendors. 11. Experience in physical design and timing closure. 12. Knowledge of RTL2GDSII flow and… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer , Netlisting to join our dynamic and growing ... logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing constraints generation… more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design Engineer ** **Job Location: Santa Clara, CA (Hybrid)** **Key Responsibilities** + Chip level floor planning, ... Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level +...**Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition… more
- Qualcomm (Santa Clara, CA)
- … design engineering positions in our SOC and core design team. As a physical design engineer you will innovate, develop, and implement chips and cores ... design , verify, and deliver complex Physical Design solutions from netlist and timing constraints...Physical Design solutions from netlist and timing constraints to the final product. **Preferred Qualifications** **10+… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion Compiler to ... distribution, Place and Route, Integration and Verification. + Staring knowledge of Physical design with convergence in timing /EM/IR with best PPA + Strong… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** The ASIC Design Engineer will need to interact internally with the Design ... that will lend itself to seamless closure in the physical design backend flows. The individual will...The individual will also be responsible for defining/ co-defining timing constraints with the customer and interface with the… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design Team, you will be responsible for ... caches , working closely with the physical design team on implementation, synthesis and timing ...between Logic design and Physical design teams responsible for achieving timing , area,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer . NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... you'll be doing: + Responsible for all aspects of physical design and implementation of GPU and...+ Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop… more
- Broadcom (San Jose, CA)
- …features as well as manage extremely large volumes of internet traffic. As a Senior Physical Design Engineer , the ideal candidate will be responsible for the ... analysis, signal and power EM checks. . Methodology & Flow development of Physical Design and Timing Closure. . Interfacing with internal and external teams… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. ... design such as Clocking, Power Delivery and Partition synthesis/APR. - Drive physical design and timing closure including FEV, LVS, DRC, and reliability… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Improvement Technology ... + Strong background with hierarchical design approach, top-down design , budgeting, timing and physical convergence. + Familiar with various process… more
- Amazon (Sunnyvale, CA)
- …that is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer -STA to continue to innovate on behalf of our customers. We are a ... & Route and other local/remote teams to address the design challenges in the context of timing ...- Should be able to work closely with IP Design teams and Backend Physical Design… more
- Broadcom (San Jose, CA)
- …timing closure - floor-planning, partitioning, placement, clock tree synthesis, route, timing analysis, timing closure, physical verification (LVS/DRC). ... and physical verification and/ or constraints development, constraints validation, timing analysis and closure. Should have experience with formal verification, … more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...timing and RC correlation + Good understanding of design rules in advanced nodes and their impact on… more
- NVIDIA (Santa Clara, CA)
- …and Verification. + Strong background with hierarchical design approach, top-down design , budgeting, timing and physical convergence. + Familiar with ... strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics...floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and… more
- Broadcom (San Jose, CA)
- …methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... apply.** **Job Description:** Broadcom is looking for a ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, … more