- Cadence Design Systems, Inc. (San Jose, CA)
- …customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route , Design Closure, and timing/power signoff + Guide customers ... are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field...IC digital implementation flows and backend EDA tools including Place and Route , IR Drop, backend design… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …innovators who want to make an impact on the world of technology. Principal Application Engineer responsible for providing pre-sales and post-sales technical ... with customers in one or more of the following areas: Synthesis, Place and Route , timing and power signoff. + Understanding and proliferating Cadence flow… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …experience with IC digital implementation flows and backend EDA tools including Synthesis, Place and Route , IR Drop, backend design timing and power closure ... are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field...IC digital implementation flows and back-end EDA tools including place and route . Prior experience with Cadence… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …customers in the areas of Backend Digital Design Implementation and Signoff including Place and Route , Design Closure, and timing/power signoffGuide customers on ... are excited to welcome highly talented hardware designers and application engineers to join our Cadence North America Field...IC digital implementation flows and backend EDA tools including Place and Route , IR Drop, backend design… more
- SpaceX (Sunnyvale, CA)
- …physical implementation steps (eg synthesis, floorplanning, power/ground grid generation, place and route , timing, noise, physical verification, ... Principal SOC/ASIC Physical Design Engineer (Silicon Engineering) at...with disabilities, or applicants requiring reasonable accommodation to the application /interview process should notify the Human Resources Department at… more
- Qualcomm (Santa Clara, CA)
- …VHDL, etc.). * 10+ years of work experience with industry standard tools for synthesis place and/or route and design verification. * 10+ years of work experience ... requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties and Responsibilities:** * Leverages advanced knowledge of computer… more