- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are seeking an innovative Timing Methodology Engineer to help drive multi-physics sign-off strategies for the ... a "learning machine" that constantly evolves by adapting to new opportunities that are hard to resolve, that only...for sign-off. + Knowledge of extraction, device physics, STA methodology and EDA tools limitations. + Shown understanding of… more
- Amazon (Cupertino, CA)
- …emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and architectures, while ... TAT improvements Work with EDA tool vendors to evaluate new methods, resolve bugs, improve usability. Fine tune cloud...7yrs in EE/CS - 5+ years developing physical design methodology or CAD flows in synthesis, PNR, and sign-off… more
- Amazon (Cupertino, CA)
- …AI services for our customers' businesses. We are seeking experienced Physical Design Engineer to build the next generation of our cloud server platforms. Our ... low cost. You'll provide leadership in the application of new technologies to large scale deployments in a continuous...- You will create and support innovative physical design methodology and CAD flows. - Develop cloud infrastructure to… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Perform methodology assessments, improve existing design methodologies, and develop new ones that leverage Cadence technology and services. + Create and conduct ... on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job...on ASIC/IC design experience who is looking for a new challenge in an absorbing customer facing role. This… more
- Microsoft Corporation (Mountain View, CA)
- …Silicon, including writing test plans, developing tests, debugging failures and coverage signoff in C++ and Universal Verification Methodology (UVM) + Experience ... cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high...infrastructure. We are looking for a **Principal Silicon DV Engineer ** to join the team. **Responsibilities** + Responsible for… more
- NVIDIA (Santa Clara, CA)
- …impact on the world! We are currently looking for a Sr VLSI Physical Verification Methodology Engineer . What you'll be doing: + Responsible for support and debug ... methodologies to improve workflow efficiency and timely issue detection. Integrate new workflows and checks into larger workflow automation systems. + Participate… more