- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- NVIDIA (Santa Clara, CA)
- …Floorsweep, In-silicon measurement, Reset, Sysctrl) + RTL design, synthesis, timing + Silicon bring-up + SOC level integration What we need to see: + BS / MS in ... chance to work on architecture, design and synthesis for System - level modules for complex GPU and Tegra...from the crowd: + Familiarity with ARM CPU and SoC system architecture, microprocessor, and microcontroller fundamentals… more
- Micron Technology, Inc. (San Jose, CA)
- …**What's Encouraged Daily** + Reviewing product and FW requirements + Working with other ASIC architects and with system architects to define and document the ... of CPU and memory architectures, data path pipelining mechanisms, distributed system design, ASIC low-power implementations, clock and reset methodologies.… more
- Qualcomm (San Jose, CA)
- …power products. * Creates advanced architectures, circuit specifications, logic designs, and/or system simulations based on system - level requirements. * ... IC Packages. * Writes and reviews detailed technical documentation for complex EDA/IP/ ASIC projects. ** Level of Responsibility:** * Works independently with… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... development cycles. 10. 5+ years of experience in IP/sub- system and/or SoC level verification… more
- Meta (Sunnyvale, CA)
- …implement IP/ SoC verification plans, build verification test benches to enable IP/sub- system / SoC level verification. 2. Develop functional tests based on ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....and/or C/C++ based verification. 10. 10+ years experience in IP/sub- system and/or SoC level verification… more
- Meta (Sunnyvale, CA)
- … Power Engineers within our Infrastructure organization to work on power/performance optimizations from SOC Architecture to System level . We are looking for ... 14. Experience with architectural performance and power models at SoC and system level 15.... systems for various design scales (IP blocks, SOC , multi-chip system ) with an understanding of… more
- Cisco (San Jose, CA)
- …Bachelor's or Master's degree in equivalent experience. * Prior experience with ASIC verification using UVM/ System Verilog. * Prior experience verifying complex ... to get full exposure to all aspects of the systems and applications we build (Silicon, Hardware, Software, telemetry,...blocks, clusters and top level for SoC * Prior experience building… more
- Qualcomm (Santa Clara, CA)
- …Engineer The team is responsible for the complete verification lifecycle, from system - level concept to tape out and post-silicon support. The responsibility ... UVM, system verilog, assertion, C++, python **Technology:** DDR, CACHE, SOC **Minimum Qualifications:** * Bachelor's degree in Science, Engineering, or related… more
- Meta (Sunnyvale, CA)
- …netlist, including RTL Lint, CDC analysis, timing constraints, synthesis to build efficient System on Chip ( SoC ) and IP for data center applications. **Required ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....for RTL-Synthesis and PrimeTime-STA for the blocks and the top- level including SOC . Analyze the inter-block timing… more
- NVIDIA (Santa Clara, CA)
- …teammate are huge plus + Experience in crafting test bench environments for unit and system level verification NVIDIA is widely considered to be one of the ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- NVIDIA (Santa Clara, CA)
- …debug tools like Verdi, GDB) + Experience crafting test bench environments for unit and system level verification + Strong background in System Verilog or ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and...verify the design and implementation of the world's leading SoC 's and GPU's. This position offers the opportunity to… more
- Qualcomm (Santa Clara, CA)
- …SS/ SOC /post silicon issues in collaboration with Design teams + Expertise in IP level / Sub- system level verification + Understanding of standard bus ... the wireless industry. In this role, you will be verifying our MAC Sub- System and ensuring highest quality deliverables. **Job responsibilities:** + Ownership of DV… more
- Google (Mountain View, CA)
- Senior Mixed-Signal ASIC Designer, Project Taara Hardware Engineering Mountain View, CA This is a fixed-term contract position for 12 months About the Team: Project ... as part of the R&D team developing cutting-edge wireless optical communication systems . The successful candidate will lead application specific integrated circuit (… more
- NVIDIA (Santa Clara, CA)
- …IPs for Hardware Security, Clocking and Silicon Correlation + Own the unit and system level verification of various IPs, create functional test plans, and verify ... NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off...intent, and implementation of the various IPs. + Enable system level integration by working with other… more
- Amazon (Sunnyvale, CA)
- …and sub- systems for testability/verifiability - Write comprehensive block and system level testplans - Build assertions, traffic generators and scoreboards ... years experience in digital verification, preferably in image processor, SoC /Interfaces - 3+ years of experience in C/C++ and...scripting (Python or TCL) - 5+ years experience in System Verilog or UVM Preferred Qualifications - Master's or… more
- Tarana Wireless (Milpitas, CA)
- …system , and software engineers to define verification strategies and execute plans at system or full chip level + Build and continuously improve verification ... the demands of next generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to...Verilog + Strong knowledge on basic concepts of VLSI, SoC architecture + Ethernet and packet processing experience +… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Cadence Compute Systems Group (CSG) develops and licenses IP for system designs. This includes CPUs and high-performance DSPs, DDR and IO controllers, hardware ... This is a hands-on management role that requires technical expertise in implementing SoC and compute-based systems . The role requires good experience in… more
- NVIDIA (Santa Clara, CA)
- …demand in a footprint that is responsible to our environment. The NVIDIA System -On-Chip ( SOC ) group is looking for a top ASIC Engineer with a curiosity about ... complex GPU and Tegra chips and interact directly with unit- level ASIC , Physical Design, CAD, Package Design,...teams. What you'll be doing: + Define and develop system - level methodologies and tools to build SOCs… more
- General Motors (Mountain View, CA)
- …This role is specifically for a staff hardware engineer with a strong focus on System on a Chip ( SoC ) and memory silicon. This individual will need to ... hardware design and development + Deep understanding of automotive SoC architecture, memory hierarchy, and ASIC design...etc.). + Understanding of IP Block + Experience with SoC silicon bring-up and Tier 1 level … more