• ASIC Chip Lead

    Broadcom (San Jose, CA)
    …before you apply.** **Job Description:** Broadcom is seeking a highly experienced and accomplished Principal ASIC Chip Lead to lead the development of ... This key role requires a deep, end-to-end understanding of the entire ASIC architecture, design, and verification flow-from initial concept and RTL development… more
    Broadcom (12/16/25)
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  • Senior Custom ASIC Engineering Lead

    Broadcom (San Jose, CA)
    …ASICs in almost all major segments of the Semiconductor industry, including AI. Our ASIC products division is looking for a senior engineer to guide Customer teams ... you will be required to do the following:** + Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design,… more
    Broadcom (11/06/25)
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  • Sr. ASIC Design Verification Engineer…

    Amazon (Sunnyvale, CA)
    …part of Amazon Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. ... and report progress to the program . Participate in the validation of ASIC implementations in Verilog/SystemVerilog . Run formal verification of complex blocks to… more
    Amazon (10/03/25)
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  • ASIC Engineering Technical Leader

    Cisco (San Jose, CA)
    …**Your Impact:** You will be in the Silicon One development organization as an ASIC Implementation Technical Lead with a primary focus on Design-for-Test. You ... Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements early in the...crafting groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through… more
    Cisco (11/22/25)
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  • Sales Executive Semiconductor Chip Design…

    Capgemini (Santa Clara, CA)
    …next-generation technologies, build executive-level relationships, and deliver transformative solutions in ASIC chip design and semiconductor services. If you ... **About the job you're considering** Are you ready to lead the charge in shaping the future of semiconductor...experience in semiconductor services sales, with a focus on ASIC chip design or engineering services. +… more
    Capgemini (12/09/25)
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  • Senior ASIC Verification Engineer

    NVIDIA (Santa Clara, CA)
    We are looking to hire a Chip Design Verification Engineer to join NVIDIA Chip Design group. The work environment is versatile, educational, dynamic and ... the Networking silicon. + Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements. + Work closely… more
    NVIDIA (11/13/25)
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  • Senior System ASIC Engineer - Speed…

    NVIDIA (Santa Clara, CA)
    …and automotive solutions. What you will be doing: + Understand chip HW features and intersection with speed characteristics. Develop state-of-art ... test requirements for Productization. + Work alongside system architects, chip and board designers, software/firmware engineers, HW/SW applications engineering,… more
    NVIDIA (11/07/25)
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  • ASIC DFT DV Technical Leader

    Cisco (San Jose, CA)
    …You will be in the Silicon One development organization as a senior DFT verification lead in San Jose, CA. You will work with Front-end RTL teams, backend physical ... design teams to understand chip architecture and drive high-quality DFT verification. **Key Essential Functions:** + Responsible for thorough test planning and… more
    Cisco (12/13/25)
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  • Senior Silicon Bringup and Test Lead

    Google (Fremont, CA)
    …qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip ( ASIC /SoC) design, with a focus on both digital logic ... Senior Silicon Bringup and Test Lead , Raxium _corporate_fare_ Google _place_ Fremont, CA, USA...the job** We are seeking a Silicon Pre-to-Post Validation Lead with experience in writing verilog code to join… more
    Google (11/22/25)
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  • GPU Strategic Sourcing Manager, Global Commodity…

    Google (Sunnyvale, CA)
    …review, and finalize agreements with external vendors and partners. + Expertise in ASIC or chip design including architecture definition, RTL coding (eg, ... or sourcing management. + 3 years of experience managing GPU, custom ASIC , or High-Performance Compute (HPC) hardware supply chains. **Preferred qualifications:** +… more
    Google (12/03/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in-system testing and prototyping. The goal is to ... C will enable you to contribute to all phases of the chip development. Additionally, effective collaboration and communication with Digital Design Engineers, Digital… more
    Meta (12/08/25)
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  • Silicon Engineer

    Microsoft Corporation (Santa Clara, CA)
    …+ Lead key components of functional validation of complex ASIC SOC using UVM/C test bench + Perform pre-silicon SoC verification, post-silicon ... achieve that mission. As a Senior Silicon Engineer - ASIC verification in the Data Processing Unit team you...to meet test plan goals + Actively participate in chip bring up and write test firmware to support… more
    Microsoft Corporation (12/17/25)
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  • Sr. RTL Design Engineer - Wireless Modem, Amazon…

    Amazon (Sunnyvale, CA)
    …a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team is using industry leading methodologies to develop proprietary ... Leo's sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites...architects and system engineers to drive hardware micro-architecture. - Lead design of 1 or more DSP data path… more
    Amazon (10/07/25)
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  • Senior Package Layout Engineer - Hardware

    NVIDIA (Santa Clara, CA)
    …world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of ... As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. + Perform substrate breakout patterns for ASIC packages. + Optimize… more
    NVIDIA (10/08/25)
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  • Packaging Technical Leader

    Cisco (San Jose, CA)
    …will drive innovation in advanced packaging technology and quality for Cisco's cutting-edge ASIC and silicon photonic products. Your Impact You will operate at the ... a technical leader in advanced packaging technology (2.5D/3D, TSV, MCM, flip- chip , heterogenous integration). Oversee various aspects such as package assembly,… more
    Cisco (11/12/25)
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  • Senior Power Validation Engineer - Post Silicon

    NVIDIA (Santa Clara, CA)
    …features to address existing and new product opportunities/requirements. Lead technical return-on-investment investigations, create/maintain feature bring-up plans ... for new silicon and participate in bring-up execution. + Lead debug efforts from HW side to root cause...with other engineering teams such as system power architects, chip and board designers, software/firmware engineers, HW/SW QA teams… more
    NVIDIA (10/28/25)
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  • Senior Technical Program Manager - DFX Engineering

    NVIDIA (Santa Clara, CA)
    …Manager to lead Design-for-Test (DFX) engineering programs for our next-generation chip designs. This role sits at the intersection of silicon design, bring-up, ... program management or engineering leadership. + Strong understanding of ASIC /SoC design, verification, bring-up, and productization flows (RTL-to-release). +… more
    NVIDIA (10/17/25)
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  • DFT Engineer

    Broadcom (San Jose, CA)
    …**Job Description:** Broadcom's CSG division is seeking candidate for a DFT lead position. The successful candidate will be responsible for leading most complex ... and cutting edge network switching ASIC DFx (Design for Test/debug & manufacturability) from DFT...is a plus + Experience or familiarity in back-end chip design, Timing, CDC flows is a plus +… more
    Broadcom (11/19/25)
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  • Senior Analog/mixed-signal IC Design Engineer…

    Cisco (San Jose, CA)
    …optical communications products. We optimize design that will integrate into the ASIC . Our team interacts with other Acacia groups including digital/DSP design, ... and productize ultra-deep sub-micron-based CMOS products. * You will lead efforts for a large block on a complex... efforts for a large block on a complex chip , mentor team members and track deliverables, participate in… more
    Cisco (11/14/25)
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  • Senior Hardware System Design Engineer

    Broadcom (San Jose, CA)
    …Switching Group (CSG) is at the forefront of developing large and integrated system-on- chip (SoC) devices for various market segments from SMB to Datacenter and ... schematics and PCB layout, board bring-up, and customer support. **Responsibilities:** + Lead the development of complex PCB system designs, from specification to… more
    Broadcom (11/04/25)
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