• Principal Layout Engineer

    ManpowerGroup (San Jose, CA)
    …wide range of Mobile, Consumer, IoT, and Industrial applications is seeking an experienced Principal Layout Engineer . **RESPONSIBILITIES:** + Layout of ... Sr. Layout Engineer **SUMMARY:** A fast-growing Power Management division focusing on Power Loss Protection, PMICs, Motor Control, and Battery Management… more
    ManpowerGroup (10/03/24)
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  • Principal RF SiP Module Design…

    Skyworks (San Jose, CA)
    Principal RF SiP Module Design Engineer Apply now " Date:Oct 5, 2024 Location: San Jose, CA, US Company: Skyworks If you are looking for a challenging and ... ID: 73273 Job Description Selected team member for the RF SiP Module Design Engineer position can work at various location of Skyworks, San Jose, CA (preferred),… more
    Skyworks (09/10/24)
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  • Principal Hardware System Design…

    CommScope, Inc. (Sunnyvale, CA)
    Principal Hardware System Design Engineer Req ID: 77103 Location: Sunnyvale, California, United States, 94089 In our 'always on' world, we believe it's essential ... It's what we do. It's in our DNA. We are looking for an experienced engineer with high-speed hardware design expertise to join our team! **How You'll help us connect… more
    CommScope, Inc. (10/12/24)
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  • Principal Circuit Design Engineer

    Microsoft Corporation (San Jose, CA)
    …sustainability related to Microsoft cloud hardware. We are looking for a ** Principal Circuit Design Engineer ** to design and build customer-focused solutions, ... + Serve as technical lead to a team of circuit and mask layout engineers + Devise methodologies for statistical analysis and timing/power/EMIR characterization +… more
    Microsoft Corporation (10/18/24)
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  • Sr Principal Engineer Hardware…

    Palo Alto Networks (Santa Clara, CA)
    …Alto Networks hardware including: specification; component selection; schematic entry; layout oversight; prototype bring-up, debug, and validation testing. The ... an interdisciplinary team including: mechanical engineering, signal integrity, PCB layout , and compliance. You will also collaborate cross-functionally with product… more
    Palo Alto Networks (08/01/24)
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  • Principal Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …hands-on experience of complete analog Back-end flow from design entry, Basic layout editing to advance automation flows specially with experience in advance process ... nodes , physical verification. with proficiency in tools like Virtuoso Schematic, Virtuoso layout , Pegasus, etc. B.Tech or equivalent with 4 to 10 years of relevant… more
    Cadence Design Systems, Inc. (10/15/24)
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  • Design Engineer - Principal /MTS…

    Micron Technology, Inc. (San Jose, CA)
    …achieve basic functionality * Responsible for delivering design simulation including post layout * Create verification plan for new and existing features and check ... encouraged behavior in Verilog * Collaborate with Product Engineering wrt validation plan and review Silicon result * Assist in silicon design validation, reticle experiments, qual and tape-out revisions as needed _Contribute to Cross Group Communication to… more
    Micron Technology, Inc. (09/20/24)
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  • Electrical Engineer , Advanced

    Zebra Technologies (San Jose, CA)
    …our customers, and the world. Let's create tomorrow together. The Senior Electrical Engineer will join a small and nimble Hardware Engineering team that will be ... requiring coordination across organizational lines. Represent the organization as the principal customer contact and often performs project leadership + The… more
    Zebra Technologies (09/27/24)
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  • ASIC Digital Design Engineer - WiFi MAC

    Qualcomm (San Jose, CA)
    …create a smarter, connected future for all. As a Qualcomm Digital ASIC Engineer , you will define, model, design, optimize, verify, validate, implement, and document ... requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and… more
    Qualcomm (09/23/24)
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  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …WiFi or WLAN; Power Optimization; ARM IP/Coresight based debug design ** Principal Duties and Responsibilities:** * Leverages advanced ASIC knowledge and experience ... route, timing and power use, and verification or similarly for custom circuit design/ layout flow. * Utilizes tools/applications (eg, RTL to GDS Flow, Virtuoso) to… more
    Qualcomm (10/10/24)
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  • Digital Design Engineer

    Qualcomm (Santa Clara, CA)
    …requiring interaction with senior leadership (eg, Director level and above). ** Principal Duties & Responsibilities:** * Leverages advanced ASIC knowledge and ... route, timing and power use, and verification or similarly for custom circuit design/ layout flow. * Utilizes tools/applications (eg, RTL to GDS Flow, Virtuoso) to… more
    Qualcomm (09/25/24)
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