• RTL Design Engineer

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 5 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... Integration. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power... code, performance and power as well as low-power design techniques. + Experience with a scripting language like… more
    Google (09/11/24)
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  • Sr. RTL Design Engineer

    Amazon (Sunnyvale, CA)
    …Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer , you will be part of an advanced architecture team that ... with team members across multiple disciplines - Develop detailed design specifications and documentation - Perform RTL ...development experience with a record of taping out production silicon - Experience with design development using… more
    Amazon (07/19/24)
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  • Staff Silicon Engineer , Physical…

    Google (Mountain View, CA)
    …technology lead driving Physical Implementation for complex ASIC project(s). + Experience with pre- silicon and post- silicon Design For Test (DFT). + ... RTL and functionality from a full chip perspective, collaborate with RTL design and architecture. Develop and own full chip timing constraints. + Perform… more
    Google (08/25/24)
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  • Silicon Power Efficiency Design

    Google (Sunnyvale, CA)
    …using SystemVerilog or similar Hardware Description Language (HDL), and industry experience in silicon power or RTL design . Preferred qualifications: + ... performance, efficiency, and integration. You will be part of a silicon design team developing ASICs used to accelerate machine learning computation in… more
    Google (08/30/24)
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  • Silicon Design Engineer 2

    Microsoft Corporation (Mountain View, CA)
    …high-performance Azure cloud servers, clients, and augmented reality. We are looking for a ** Silicon ** ** Design Engineer ** **2** to work on leading edge ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...will be responsible for microarchitecture and Register Transfer Level ( RTL ) implementation of IP blocks, working with a group… more
    Microsoft Corporation (09/10/24)
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  • Sr. DDR IP Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr. DDR IP Design Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... of enabling human life on Mars. SR. DDR IP DESIGN ENGINEER ( SILICON ENGINEERING) At...Controller/PHY IP core development and integration + Responsible for RTL design , synthesis, timing constraints, power estimation,… more
    SpaceX (07/22/24)
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  • Sr. Design Verification Engineer

    SpaceX (Sunnyvale, CA)
    …and analyzing results + Experience with scripting languages, eg Python for automation + RTL design , chip bring-up, and post- silicon validation experience + ... Sr. Design Verification Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out… more
    SpaceX (09/05/24)
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  • ASIC Design Engineer , Machine…

    Google (Mountain View, CA)
    …field, or equivalent practical experience. + 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog ... SystemVerilog. + Experience with logic synthesis techniques to optimize RTL code, performance and power as well as low-power...Silicon Validation teams to ensure functionality of the design . + Provide input on synthesis, timing closure, and… more
    Google (08/24/24)
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  • Sr. SOC/ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ASIC Physical Design Engineer ( Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER ( SILICON ENGINEERING) At...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (08/16/24)
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  • Silicon Prototyping Emulation…

    Meta (Sunnyvale, CA)
    …comfortable working complex SoC devices, emulation flows, virtualized sensors, displays, RTL design /verification, CV/ML/Gfx algorithms, OS/RTOS kernel and driver ... silicon , hardware, software, and content. Meta Reality Labs team seeks Silicon prototyping Emulation engineer .Our End-to-End (E2E) pre- silicon team… more
    Meta (08/23/24)
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  • Silicon DD Engineer III

    Actalent (West Menlo Park, CA)
    Job Title: Silicon DD Engineer IIIJob Description The team...years of experience as a Digital Design Engineer + Recent experience with IP RTL coding ... within the past 2-3 years + Experience having worked on a design from scratch + Experience in RTL coding and coding for low power in ASICs + Experience in… more
    Actalent (09/17/24)
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  • Silicon Prototyping FPGA Engineer

    Meta (Sunnyvale, CA)
    …FPGA/Emulation platform builder, comfortable working on boards, sensors, displays, RTL design /verification, CV/ML/Gfx algorithms, virtual platforms, OS/RTOS ... silicon , hardware, software, and content. Facebook Reality Labs team seeks a Silicon Prototyping (FPGA) Engineer . Our End-to-End (E2E) proto team enables this… more
    Meta (08/06/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and… more
    NVIDIA (09/11/24)
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  • Physical Design Engineer

    Cisco (San Jose, CA)
    …an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design ... silicon validation phases with additional exposure to physical design signoff activities. What You'll Do You will be...which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer more
    Cisco (09/14/24)
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  • Senior SOC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is hiring a Senior Design Engineer to design , analyze, and evolve next generation SoC solutions. We are looking for special individuals with passion ... power analysis, methodology alignment, and program execution to ensure pre- silicon and post silicon targets are met....of external and internal IPs. + Contribute to cross-team RTL methodologies to achieve efficient design reuse.… more
    NVIDIA (07/23/24)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    …analyzers and/or other silicon visibility tools. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis, timing ... Design for Debug (DFD) Architect and Methodology Engineer ! NVIDIA is seeking a DFD Architect to implement...teams at NVIDIA. + Work closely with software, architecture, design , verification, and silicon validation teams. +… more
    NVIDIA (09/12/24)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    …implement in RTL , and deliver a fully verified, synthesis/timing clean design . + Support post- silicon validation activities working with Silicon ... We are now looking for a Senior Hardware Design Engineer for our Tegra group!...a team of hardworking engineers working across the micro-architecture, design , verification, implementation, and post silicon validation… more
    NVIDIA (07/19/24)
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  • Senior Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Hardware Design Engineer for our Tegra group! NVIDIA is seeking passionate Senior Hardware Design Engineers to architect, ... We are a team of hardworking engineers working across the micro-architecture, design , verification, implementation, and post silicon validation of NVIDIA… more
    NVIDIA (09/10/24)
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  • Principal Design Verification…

    Microsoft Corporation (Mountain View, CA)
    …cloud servers, clients, and augmented reality. We are looking for a **Principal Design Verification Engineer ** to work on leading edge IP (intellectual property) ... produce cutting edge technology that changes our world. Microsoft's Silicon team builds custom silicon for a...also be valuable + System Verilog and UVM. + Design register-transfer level( RTL )/hardware experience. + Understand C… more
    Microsoft Corporation (09/13/24)
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  • ASIC Design Engineer , Blink/Ring…

    Amazon (Sunnyvale, CA)
    …and area for significant IPs early in design cycle - Execute on design specifications to deliver high quality RTL - Ensure quality by running and ... Description Join the team which delivers highly differentiated silicon into Blink and Ring battery powered devices....tracking results of front-end tools including: Synthesis, Lint ( RTL , DFT, UPF), Power Analysis and STA - Work… more
    Amazon (09/04/24)
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