- Capgemini (Santa Clara, CA)
- …US by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _RTL Engineer - RTL Signoff Engineer_ **Location:** _CA-Santa Clara_ ... We at Capgemini engineering are looking for a top-tier RTL Engineer . In this role you will...to run Real Intent tools LINT, CDC and RDC signoff tools. Setup Real Intent tools for RTL… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Sr. SOC Design Engineer -STA to continue to innovate on behalf of our customers. We are a part of ... history. Roles & Responsibilities: - Includes definition and development of signoff methodology and corresponding implementation solution - Flow for STA, Crosstalk… more
- Cisco (San Jose, CA)
- …physical design Team which is responsible for full Chip physical implementation from RTL to GDSII. As Physical Verification Engineer your main responsibilities ... primary focus on Design-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip...silicon validation phases with additional exposure to physical design signoff activities. What You'll Do You will be part… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out exploring ... goal of enabling human life on Mars. SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in building rockets… more
- Microsoft Corporation (Mountain View, CA)
- …Intelligence Silicon Engineering team is seeking a **Senior Design Verification Engineer ** to deliver premium-quality designs once considered impossible. We are ... an extremely efficient manner. We are looking for a **Senior Design Verification Engineer ** to work in the dynamic Microsoft Artificial Intelligence System on Chip… more