- NVIDIA (Santa Clara, CA)
- …us today. The NVIDIA Clocks group is looking for a top ASIC Methodology engineer with proven experience in high-speed logic design and verification. In order ... has increased significantly. Modern clocking design needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... and/or full chip level. + Work with PD, DFX, Clocks , and other teams in coming up with timing...experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS… more